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SLG4B41337 Datasheet(PDF) 8 Page - Dialog Semiconductor |
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SLG4B41337 Datasheet(HTML) 8 Page - Dialog Semiconductor |
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8 / 13 page ![]() SLG4B41337 Battery Saver SLG4B41337_DS_r100 Page 8 8 Channel 1 (yellow/top line) – PIN#5 (VSYS IN) D0 – PIN#2 (BUTTON) D1 – PIN#3 (REGN) D2 – PIN#10 (BTN SENSE) Channel 2 (light blue) – PIN#7 (VSYS OUT) with external 5k Ω pull down resistor D3 – PIN#4 (PWR ON) D4 – PIN#13 (EN OUT) D5 – PIN#11 (BTN OUT) with external 5k Ω pull up resistor 5. Chip functionality: shape delay time for EN OUT Channel 1 (yellow/top line) – PIN#14 (VDD) D0 – POR D1 – DFF2 Output D2 – PIN#3 (REGN) D3 – PIN#13 (EN OUT) 6. Chip powers on: EN OUT is 15ms rising edge delayed |
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