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HT45F5R Datasheet(PDF) 109 Page - Holtek Semiconductor Inc |
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HT45F5R Datasheet(HTML) 109 Page - Holtek Semiconductor Inc |
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109 / 138 page  Rev. 1.10 108 De�e��e� 1�� �01� Rev. 1.10 109 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU Interrupts Interruptsareanimportantpartofanymicrocontrollersystem.Whenanexternaleventoran internalfunctionsuchasaTimerModuleoranA/Dconverterrequiresmicrocontrollerattention, theircorrespondinginterruptwillenforceatemporarysuspensionofthemainprogramallowing themicrocontrollertodirectattentiontotheirrespectiveneeds.Thedevicecontainsoneexternal interruptandinternalinterruptsfunctions.Theexternalinterruptisgeneratedbytheactionofthe externalINTnpin,whiletheinternalinterruptsaregeneratedbyvariousinternalfunctionssuchas theTMs,TimeBase,EEPROM,OCVP,LVDandtheA/Dconverter. Interrupt Registers Overallinterruptcontrol,whichbasicallymeansthesettingofrequestflagswhencertain microcontrollerconditionsoccurandthesettingofinterruptenablebitsbytheapplicationprogram, iscontrolledbyaseriesofregisters,locatedintheSpecialPurposeDataMemory,asshowninthe accompanyingtable.Thenumberofregistersdependsuponthedevicechosenbutfallintothree categories.ThefirstistheINTC0~INTC2registerswhichsetuptheprimaryinterrupt,thesecond istheMFI0~MFI2registerswhichsetuptheMulti-functioninterrupts.FinallythereisanINTEG registertosetuptheexternalinterrupttriggeredgetype. Eachregistercontainsanumberofenablebitstoenableordisableindividualregistersaswellas interruptflagstoindicatethepresenceofaninterruptrequest.Thenamingconventionofthese followsaspecificpattern.Firstislistedanabbreviatedinterrupttype,thenthe(optional)numberof thatinterruptfollowedbyeitheran"E"forenable/disablebitor"F"forrequestflag. Function Enable Bit Request Flag Notes Glo�al EMI — — INTn Pin INTnE INTnF n=0 o� 1 Ti�e Base TBnE TBnF n=0 o� 1 Multi-fun�tion MFnE MFnF n=0~� OCVP fun�tion OCVPF OCVPE — LVD LVE LVF — EEPROM DEE DEF — A/D Conve�te� ADE ADF — TM STMAE STMAF — STMPE STMPF PTMnAE PTMnAF n=0 o� 1 PTMnPE PTMnPF Interrupt Register Bit Naming Conventions Register Name Bit 7 6 5 4 3 2 1 0 INTEG — — — — INT1S1 INT1S0 INT0S1 INT0S0 INTC0 — MF0F TB0F INT0F MF0E TB0E INT0E EMI INTC1 TB1F ADF DEF OCVPF TB1E ADE DEE OCVPE INTC� LVDF MF�F MF1F INT1F LVDE MF�E MF1E INT1E MFI0 — — STMAF STMPF — — STMAE STMPE MFI1 — — PTM0AF PTM0PF — — PTM0AE PTM0PE MFI� — — PTM1AF PTM1PF — — PTM1AE PTM1PE Interrupt Registers List |
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