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AD7228LPZ Datasheet(PDF) 12 Page - Analog Devices

Part # AD7228LPZ
Description  LC2MOS Octal 8-Bit DAC
PDF  16 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7228LPZ Datasheet(HTML) 12 Page - Analog Devices

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Data Sheet
AD7228
Rev. D | Page 11 of 15
Timing Deskew
Signal edges slowing or rounding off by the time they reach the
pin driver circuitry is a common problem in automated test
equipment (ATE) applications. Square up the edge at the pin
driver to overcome this problem. However, because each edge is
not rounded off by the same extent, this squaring up may lead
to incorrect timing relationship between signals. This effect is
shown in Figure 13.
BUFFER TRIGGER POINT
HIGH-SPEED
BUFFER
Figure 13. Time Skewing Due to Slowing of Edges
The circuit of Figure 14 shows how two DACs of the AD7228
can help overcome the problem of time skewing. The same two
signals are applied to this circuit as are applied in Figure 14. The
output of each DAC is applied to one input of a high speed
comparator, and the signals are applied to the other inputs.
Varying the output voltage of the DAC effectively varies the
trigger point at which the comparator flips. Therefore, the timing
relationship between the two signals can be programmably
corrected (or deskewed) by varying the code to the DAC of
the AD7228. In a typical application, the code is loaded to the
DACs for correct timing relationships during the calibration
cycle of the instrument.
POSITION OF THIS EDGE
PROGRAMMED BY CODE
TO DAC2
*ADDITIONAL PINS OMITTED FOR CLARITY.
POSITION OF THIS EDGE
PROGRAMMED BY CODE
TO DAC1
HIGH-SPEED
COMPARATORS
VREF
AD7228*
VSS
VDD
VOUT2
VOUT1
GND
11
1
10
12
9
8
Figure 14. AD7228 Timing Deskew Circuit
Coarse/Fine Adjust
Pair the DACs on the AD7228 together to form a coarse/fine
adjust function as shown in Figure 15. The function is achieved
using one external op amp and a few resistors per pair of DACs.
DAC 1 is the most significant or coarse DAC. Data is first loaded to
this DAC to coarsely set the output voltage. DAC 2 is then used
to fine tune this output voltage. Varying the ratio of R1 to R2
varies the relative effect of the coarse and fine DACs on the
output voltage. For the resistor values shown, DAC 2 has a
resolution of 150 μV in a 10 V output range. Because each DAC
on the AD7228 is guaranteed monotonic, the coarse adjustment
and fine adjustment are each monotonic. One application for
this is as a setpoint controller (see the AN-317 Application
Note, “Circuit Applications of the AD7226 Quad CMOS DAC,”
available from Analog Devices, Inc.).
12
8
11
1
GND
*ADDITIONAL PINS OMITTED FOR CLARITY.
VSS
–5V
VDD
VOUT2
VREF
AD7228*
10
DAC 2
9
VOUT1 200Ω
51.2kΩ
200Ω
VOUT
51.2kΩ
DAC 1
A1
Figure 15. Coarse/Fine Adjust Circuit
Self Programmable Reference
The circuit of Figure 16 shows how one DAC of the AD7228, in
this case DAC 1, can be used in a feedback configuration to
provide a programmable reference for itself and the other seven
converters. The relationship of VREF to VIN is expressed by
IN
REF
V
D
G
G
V
)
1
(
)
1
(
1
where G = R2/R1.
*ADDITIONAL PINS OMITTED FOR CLARITY.
AD7228*
9
VOUT1
A1
R2
R1
VIN
12
GND
VSS
–5V
+15V
10
11
1
VDD
VREF
Figure 16. Self Programmable Reference



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