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4100 Datasheet(PDF) 10 Page - Cypress Semiconductor

Part # 4100
Description  Programmable System-on-Chip (PSoC짰)
PDF  43 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

4100 Datasheet(HTML) 10 Page - Cypress Semiconductor

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Document Number: 001-87220 Rev. *J
Page 10 of 43
PSoC® 4: PSoC 4100 Family
Datasheet
Notes:
1. tcpwm_p and tcpwm_n refer to tcpwm non-inverted and inverted outputs respectively.
2. P3.2 and P3.3 are SWD pins after boot (reset).
24
P0.0
22
P0.0
19
P0.0
28
P0.0
comp1_inp
–
–
–
scb0_spi_ssel_1
Port 0 Pin 0: gpio, lcd, csd, scb0, comp
25
P0.1
23
P0.1
20
P0.1
29
P0.1
comp1_inn
–
–
–
scb0_spi_ssel_2
Port 0 Pin 1: gpio, lcd, csd, scb0, comp
26
P0.2
24
P0.2
21
P0.2
30
P0.2
comp2_inp
–
–
–
scb0_spi_ssel_3
Port 0 Pin 2: gpio, lcd, csd, scb0, comp
27
P0.3
25
P0.3
22
P0.3
31
P0.3
comp2_inn
–
–
–
–
Port 0 Pin 3: gpio, lcd, csd, comp
28
P0.4
26
P0.4
–
–
32
P0.4
–
–
scb1_uart_rx[1]
scb1_i2c_scl[1]
scb1_spi_mosi[1]
Port 0 Pin 4: gpio, lcd, csd, scb1
29
P0.5
27
P0.5
–
–
33
P0.5
–
–
scb1_uart_tx[1]
scb1_i2c_sda[1]
scb1_spi_miso[1]
Port 0 Pin 5: gpio, lcd, csd, scb1
30
P0.6
28
P0.6
23
P0.6
34
P0.6
–
ext_clk
–
–
scb1_spi_clk[1]
Port 0 Pin 6: gpio, lcd, csd, scb1, ext_clk
31
P0.7
29
P0.7
24
P0.7
35
P0.7
–
–
–
wakeup
scb1_spi_ssel_0[1] Port 0 Pin 7: gpio, lcd, csd, scb1, wakeup
32
XRES
30
XRES
25
XRES
36
XRES
–
–
–
–
–
Chip reset, active low
33
VCCD
31
VCCD
26
VCCD
37
VCCD
–
–
–
–
–
Regulated supply, connect to 1µF cap or
1.8V
–
–
–
–
–
–
38
VSSD
–
–
–
–
–
Digital Ground
34
VDDD
32
VDDD
27
VDD
39
VDDD
–
–
–
–
–
Digital Supply, 1.8 - 5.5V
35
VDDA
33
VDDA
27
VDD
40
VDDA
–
–
–
–
–
Analog Supply, 1.8 - 5.5V, equal to VDDD
36
VSSA
34
VSSA
28
VSS
41
VSSA
–
–
–
–
–
Analog Ground
37
P1.0
35
P1.0
1
P1.0
42
P1.0
ctb.oa0.inp
tcpwm2_p[1]
–
–
–
Port 1 Pin 0: gpio, lcd, csd, ctb, pwm
38
P1.1
36
P1.1
2
P1.1
43
P1.1
ctb.oa0.inm
tcpwm2_n[1]
–
–
–
Port 1 Pin 1: gpio, lcd, csd, ctb, pwm
39
P1.2
37
P1.2
3
P1.2
44
P1.2
ctb.oa0.out
tcpwm3_p[1]
–
–
–
Port 1 Pin 2: gpio, lcd, csd, ctb, pwm
40
P1.3
38
P1.3
–
–
45
P1.3
ctb.oa1.out
tcpwm3_n[1]
–
–
–
Port 1 Pin 3: gpio, lcd, csd, ctb, pwm
41
P1.4
39
P1.4
–
–
46
P1.4
ctb.oa1.inm
–
–
–
–
Port 1 Pin 4: gpio, lcd, csd, ctb
42
P1.5
–
–
–
–
47
P1.5
ctb.oa1.inp
–
–
–
–
Port 1 Pin 5: gpio, lcd, csd, ctb
43
P1.6
–
–
–
–
48
P1.6
ctb.oa0.inp_alt
–
–
–
–
Port 1 Pin 6: gpio, lcd, csd
44
P1.7/VREF
40
P1.7/VREF
4
P1.7/VREF
1
P1.7/VREF ctb.oa1.inp_alt
ext_vref
––
–
–
Port 1 Pin 7: gpio, lcd, csd, ext_ref
44-TQFP
40-QFN
28-SSOP
48-TQFP
Alternate Functions for Pins
Pin Description
Pin
Name
Pin
Name
Pin
Name
Pin
Name
Analog
Alt 1
Alt 2
Alt 3
Alt 4



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