MB91460C datasheet(39/106 Pages) CYPRESS

39 / 106 page

Document Number: 002-04609 Rev. *A

Page 39 of 106

MB91460C Series

FSV1 (bit15 to bit0)

The setting of the Flash Security Vector FSV1 bits [15:0] is responsible for the individual write protection of the 8 Kbytes sectors. It is

only evaluated if write protection bit FSV1[17] is set.

Explanation of the bits in the Flash Security Vector FSV1[15:0]

Note: It is mandatory to always set the sector where the Flash Security Vectors FSV1 and FSV2 are located to write protected (here

sector SA4). Otherwise it is possible to overwrite the Security Vector to a setting where it is possible to either read out the

Flash content or manipulate data by writing.

See section “9.3. Flash access in CPU mode” for an overview about the sector organisation of the Flash Memory

FSV1 bit

Sector

Enable Write

Protection

Disable Write

Protection

Comment

FSV1[0]

SA0

set to “0”

set to “1”

Sectors available on MB91F467Cx only

FSV1[1]

SA1

set to “0”

set to “1”

FSV1[2]

SA2

set to “0”

set to “1”

FSV1[3]

SA3

set to “0”

set to “1”

FSV1[4]

SA4

set to “0”



Write protection is mandatory!

FSV1[5]

SA5

set to “0”

set to “1”

FSV1[6]

SA6

set to “0”

set to “1”

FSV1[7]

SA7

set to “0”

set to “1”

FSV1[15:8]





not available

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