S29CD032J datasheet(39/74 Pages) CYPRESS

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Document Number: 002-00948 Rev. *C

Page 39 of 74

S29CD032J

S29CD016J

S29CL032J

S29CL016J

8.2

Persistent Protection Bits

The Persistent Protection Bits are unique and nonvolatile. A single Persistent Protection Bit is assigned to a maximum for four

sectors (see the sector address tables for specific sector protection groupings). All eight-Kbyte boot-block sectors have individual

sector Persistent Protection Bits (PPBs) for greater flexibility.

Notes

1. Each PPB is individually programmed and all are erased in parallel. There are no means for individually erasing a specific

PPB and no specific sector address is required for this operation.

2. If a PPB requires erasure, all of the sector PPBs must first be programmed prior to PPB erasing. It is the responsibility of

the user to perform the preprogramming operation. Otherwise, an already erased sector PPB has the potential of being

over-erased. There is no hardware mechanism to prevent sector PPB over-erasure.

3. If the PPB Lock Bit is set, the PPB Program or erase command does not execute and times-out without programming or

erasing the PPB.

8.2.1 Programming PPB

The PPB Program Command is used to program, or set, a given PPB. The first three cycles in the PPB Program Command are

standard unlock cycles. The fourth cycle in the PPB Program Command executes the pulse which programs the specified PPB. The

user must wait either 100 µs or until DQ6 stops toggling before executing the fifth cycle, which is the read verify portion of the PPB

Program Command. The sixth cycle outputs the status of the PPB Program operation.

In the event that the program PPB operation was not successful, the user can loop directly to the fourth cycle of the PPB Program

Command to perform the program pulse and read verification again. After four unsuccessful loops through the program pulse and

read verification cycles the PPB programming operation should be considered a failure.

Figure 10. PPB Program Operation

Either poll DQ6 in the

small bank and wait for

it to stop toggling OR

wait 100

μs

DQ0 = 1?

Write 0x68 to SG+WP

Write 0x48 to SG+WP

Read from SG+WP

YES

Done

Error

Write 0xAA to 0x555

Write 0x55 to 0x2AA

Write 0x60 to 0x555

5th attempt?

Note: Reads from the

small bank at this point

return the status of the

operation, not read array

data.

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