ACT8849 datasheet(33/35 Pages) ACTIVE-SEMI

33 / 35 page

ACT8849

Rev PrB, 12-Jun-14

Innovative PowerTM

- 33 -

www.active-semi.com

Active-Semi Confidential―Do Not Copy or Distribute

ActivePMU

TM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

LOW-NOISE, LOW-DROPOUT LINEAR REGULATORS

General Description

ACT8849 features eight low-noise, low-dropout

linear regulators (LDOs) that supply up to 350mA.

Three of these LDOs (REG10, REG11, and

REG12) supports extended input voltage range

down to 1.7V. Each LDO has been optimized to

achieve low noise and high-PSRR.

Output Current Limit

Each LDO contains current-limit circuitry featuring a

current-limit fold-back function. During normal and

moderate overload conditions, the regulators can

support more than their rated output currents.

During extreme overload conditions, however, the

current limit is reduced by approximately 30%,

reducing power dissipation within the IC.

Compensation

The LDOs are internally compensated and require

very little design effort, simply select input and

output capacitors according to the guidelines below.

Input Capacitor Selection

Each LDO requires a small ceramic input capacitor

to supply current to support fast transients at the

input of the LDO. Bypassing each INL pin to GA

with 1μF. High quality ceramic capacitors such as

X7R and X5R dielectric types are strongly

recommended.

Output Capacitor Selection

Each LDO requires a small 2.2μF ceramic output

capacitor for stability . For best performance, each

output capacitor should be connected directly

between the output and GA pins, as close to the

output as possible, and with a short, direct

connection. High quality ceramic capacitors such as

X7R and X5R dielectric types are strongly

recommended.

Configuration Options

Output Voltage Programming

By default, each LDO powers up and regulates to

its default output voltage. Once the system is

enabled, each output voltage may be independently

programmed to a different value by writing to the

regulator's VSET[-] register via the I2C serial

interface as shown in Table 5.

Enable / Disable Control

During normal operation, each LDO may be

enabled or disabled via the I2C interface by writing

to that LDO's ON[ ] bit.

Output Discharge

Each of the LDOs features an optional output

discharge function, which discharges the output to

ground through a 1.5kΩ resistance when the LDO is

disabled. This feature may be enabled or disabled

by setting DIS[-]; set DIS[-] to 1 to enable this

function, clear DIS[-] to 0 to disable it.

OK[ ] and Output Fault Interrupt

Each LDO features a power-OK status bit that can

be read by the system microprocessor via the

interface. If an output voltage is lower than the

power-OK threshold, typically 11% below the

programmed regulation voltage, the value of that

regulator's OK[-] bit will be 0.

If a LDO's nFLTMSK[-] bit is set to 1, the ACT8849

will interrupt the processor if that LDO's output

voltage falls below the power-OK threshold. In this

case, nIRQ will assert low and remain asserted until

either the regulator is turned off or back in

regulation, and the OK[-] bit has been read via I2C.

PCB Layout Considerations

The ACT8849’s LDOs provide good DC, AC, and

noise performance over a wide range of operating

conditions, and are relatively insensitive to layout

considerations. When designing a PCB, however,

careful layout is necessary to prevent other circuitry

from degrading LDO performance.

A good design places input and output capacitors

as close to the LDO inputs and output as possible,

and utilizes a star-ground configuration for all

regulators

prevent

noise-coupling

through

ground. Output traces should be routed to avoid

close proximity to noisy nodes, particularly the SW

nodes of the DC/DCs.

REFBP is a noise-filtered reference, and internally

has a direct connection to the linear regulator

controller. Any noise injected onto REFBP will

directly affect the outputs of the linear regulators,

and therefore special care should be taken to

ensure that no noise is injected to the outputs via

REFBP. As with the LDO output capacitors, the

REFBP bypass capacitor should be placed as close

to the IC as possible, with short, direct connections

to the star-ground. Avoid the use of via whenever

possible. Noisy nodes, such as from the DC/DCs,

should be routed as far away from REFBP as

possible.

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