PAC5225 datasheet(21/71 Pages) ACTIVE-SEMI

21 / 71 page

PAC5225

Power Application Controller

9V, or 12V by the microcontroller after initialization. When VP is lower than the target regulation voltage, the internal

feedback control circuitry causes the inductor current to increase to raise VP. Conversely, when VP is higher than the

regulation voltage, the feedback loop control causes the inductor current to decrease to lower VP. The feedback loop is

internally stabilized. The output current capability of the switching supply is determined by the external current sense

resistor. In the high-side current sense buck or SEPIC mode, the inductor current signal is sensed differentially between the

CSM pin and VP, and has a peak current limit threshold of 0.26V. In the low-side current sense flyback mode, the inductor

current signal is sensed differentially between the CSM pin and VSSP, and has a peak current limit threshold of 1V.

The MMSS controller is flexible and configurable as a buck, SEPIC or an AC/DC converter. Input sources include battery

supply for buck mode (Figure 10-2) or SEPIC mode (Figure 10-3), and AC Line Supply for AC/DC Flyback (Figure 10-4).

The MMSS controller operational mode is determined by external configuration and register settings from the

microcontroller after power up. It can operate in either high-side or low-side current sense mode, and does not require

external feedback loop compensation circuitry. For optional extended application range, the MMSS also incorporates

additional digital control by the microcontroller to add accurate computations for outer feedback loop control such as power

factor correction and accurate current control.

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Rev 2.0‒September 22, 2017

Figure 10-2. Buck Mode

VHM

DRM

CSM

PAC52xx

(15V default)

VHM

DRM

CSM

PAC5225

Figure 10-3. SEPIC Mode

PAC5225

VHM

DRM

CSM

(9V/12V/15V)

PAC5225 Datasheet(PDF) 21 Page - Active-Semi, Inc