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MPQ6523 Datasheet(PDF) 13 Page - Monolithic Power Systems |
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MPQ6523 Datasheet(HTML) 13 Page - Monolithic Power Systems |
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13 / 16 page ![]() MPQ6523 – TRIPLE HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL MPQ6523 Rev.1.01 www.MonolithicPower.com 13 9/5/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. Table 2: Output Data Protocol Bit Input Register Function 0 TP Temperature pre-warning: high = warning (over-temperature shutdown see remark below). 1 n. u. Not used. 2 n. u. Not used. 3 Status LS1 Normal operation: high = output is on, low = output is off. Open-load detection: high = open load, low = no open load (correct load condition is detected if the corresponding output is switched off). 4 Status HS1 Normal operation: high = output is on, low = output is off. Open-load detection: high = open load, low = no open load (correct load condition is detected if the corresponding output is switched off). 5 n. u. Not used. 6 n. u. Not used. 7 Status LS2 See LS1. 8 Status HS2 See HS1. 9 n. u. Not used. 10 n. u. Not used. 11 Status LS3 See LS1. 12 Status HS3 See HS1. 13 SCD Short circuit detected. Set SCD high when at least one output is switched off by a short-circuit condition. 14 EN Enable. EN is controlled by software (bit SE in input register) and hardware Enable (EN). Low = standby, high = normal operation. 15 PSF Power supply fail. Under-voltage at VS detected. NOTE: Bit0 to 15 = high: over-temperature shutdown. Table 3: Status of the Input Register after Power-On Reset Bit15 (SE) Bit14 (SCT) Bit13 (OLD) Bit12 (HS3) Bit11 (LS3) Bit10 Bit9 Bit8 (HS2) Bit7 (LS2) Bit6 Bit5 Bit4 (HS1) Bit3 (LS1) Bit2 Bit1 Bit0 (SRR) H H H L L x x L L x x L L x x L |
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