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LT8642S

Rev 0

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APPLICATIONS INFORMATION

Output Power Good

When the LT8642S’s output voltage is within the ±8%

window of the regulation point, the output voltage is

considered good and the open-drain PG pin goes high

impedance and is typically pulled high with an external

resistor. Otherwise, the internal pull-down device will pull

the PG pin low. To prevent glitching both the upper and

lower thresholds include 0.4% of hysteresis. PG is valid

when VIN is above 2.8V.

The PG pin is also actively pulled low during several fault

conditions: EN/UV pin is below 0.99V, INTVCC has fallen

too low, VIN is too low, or thermal shutdown.

Paralleling

To increase the possible output current, two LT8642Ss

can be connected in parallel to the same output. To do

this, the VC and FB pins are connected together, and each

LT8642S’s SW node is connected to the common out-

put through its own inductor. The CLKOUT pin of one

LT8642S should be connected to the SYNC/MODE pin

of the second LT8642S to have both devices operate

in the same mode. During FCM, Spread Spectrum, and

Synchronization modes, both devices will operate at the

same frequency and phase. Figure 6 shows an applica-

tion where two LT8642Ss are paralleled to get one output

capable of up to 20A.

Shorted and Reversed Input Protection

The LT8642S will tolerate a shorted output. Several fea-

tures are used for protection during output short-circuit

and brownout conditions. The first is the switching

frequency will be folded back while the output is lower

than the set point to maintain inductor current control.

Second, the bottom switch current is monitored such that

if inductor current is beyond safe levels switching of the

top switch will be delayed until such time as the inductor

current falls to safe levels.

Frequency foldback behavior depends on the state of the

SYNC pin: If the SYNC pin is low the switching frequency

will slow while the output voltage is lower than the pro-

grammed level. If the SYNC pin is connected to a clock

source, floated or tied high, the LT8642S will stay at the

programmed frequency without foldback and only slow

switching if the inductor current exceeds safe levels.

There is another situation to consider in systems where the

output will be held high when the input to the LT8642S is

absent. This may occur in battery charging applications or

in battery-backup systems where a battery or some other

supply is diode ORed with the LT8642S’s output. If the VIN

pin is allowed to float and the EN pin is held high (either

by a logic signal or because it is tied to VIN), then the

LT8642S’s internal circuitry will pull its quiescent current

through its SW pin. This is acceptable if the system can

tolerate current draw in this state. If the EN pin is grounded

the SW pin current will drop to near 1µA. However, if the

VIN pin is grounded while the output is held high, regard-

less of EN, parasitic body diodes inside the LT8642S

can pull current from the output through the SW pin and

the VIN pin. Figure 7 shows a connection of the VIN and

EN/UV pins that will allow the LT8642S to run only when

the input voltage is present and that protects against a

shorted or reversed input.

Figure 6. Paralleling Two LT8642Ss

LT8642S

8642S F06

CLKOUT

LT8642S

SYNC/MODE

COUT

VOUT

20A

Figure 7. Reverse VIN Protection

VIN

LT8642S

EN/UV

8642S F07

GND

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