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LTC4366 Datasheet(PDF) 16 Page - Linear Technology

Part # LTC4366
Description  High Voltage Surge Stopper
PDF  24 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4366 Datasheet(HTML) 16 Page - Linear Technology

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LTC4366
436612fe
For more information www.linear.com/LTC4366
16
APPLICATIONS INFORMATION
Layout Considerations
Due to the high impedances on the SD, VDD, and GATE
pins, these pins are susceptible to leakages to ground.
For example, a leakage to ground on SD will activate the
shutdown state if greater than 1.6µA. Providing adequate
spacingawayfromgroundedtracesandaddingconformal
coating on exposed pins lowers the risk that leakage cur-
rent will interrupt system operation.
It is important to put the bypass capacitor, C1, as close as
possible to the OUT and VSS pins. Place the 10Ω resistor
as close as possible to the MOSFET gate pin. This will
limit the parasitic trace capacitance that leads to MOSFET
self-oscillation.
The FB pin is sensitive to parasitic capacitance when the
regulation loop is closed. One result from this capacitive
loading is output oscillations during overvoltage regula-
tion. It is suggested that the resistors RFB1 and RFB2 be
placed close to the pin and that the FB trace itself be
minimized in size.
DESIGN EXAMPLE
Overview
The design process starts with minimum input voltage
start-up equations to calculate values for RSS and RIN.
These values need further refinement to meet two other
conditions: the maximum input voltage start-up condi-
tions and proper current for the charging of C1. The the
remaining element values are calculated based on the
input parameters.
Following are the input parameters for this example:
VSUPPLY(MIN) = 18V, VREG = 43V, VIN(MAX) = 250V, ILOAD
= 1.5A at start-up, ILOAD = 3A after start-up, VTH = 5V
ImportantElectricalCharacteristicstableparametersused
in this example are summarized in Table 1.
Step 1: Maximum RSS
In this design example (Figure 6.) the component sizing
first considers the start-up phase after the charge pump
is active. The goal is to maximize the resistance of RSS
which still allows operation when the input voltage is at
the minimum value.
VDD
SD
R1
470k
R2
100k
OUT
CG
10nF
GATE
M1
FQA62N25C
SD
FB
CT
8.2nF
C1
0.47µF
RFB1
12.4k
VOUT
1.5A
(43V CLAMP)
VIN
28V
(18V DC TO 250V DC)
RFB2
422k
436612 F06
RSS
46.4k
RG
10
RIN
324k
Q1
MMBT3904
LTC4366-2
TIMER
BASE
VSS
Figure 6. Overvoltage Protected 28V, 1.5A Supply



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