ISL6257 datasheet(21/22 Pages) RENESAS

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ISL6257

FN9288 Rev 2.00

Page 21 of 22

Jan 17, 2007

Component Placement

The power MOSFET should be close to the IC so that the gate

drive signal, the LGATE, UGATE, PHASE, and BOOT, traces

can be short.

Place the components in such a way that the area under the IC

has less noise traces with high dV/dt and di/dt, such as gate

signals and phase node signals.

Signal Ground and Power Ground Connection

At minimum, a reasonably large area of copper, which will

shield other noise couplings through the IC, should be used as

signal ground beneath the IC. The best tie-point between the

signal ground and the power ground is at the negative side of

the output capacitor on each side, where there is little noise; a

noisy trace beneath the IC is not recommended.

GND and VDD Pin

At least one high quality ceramic decoupling cap should be

used to cross these two pins. The decoupling cap can be put

close to the IC.

LGATE Pin

This is the gate drive signal for the bottom MOSFET of the

buck converter. The signal going through this trace has both

high dV/dt and high di/dt, and the peak charging and

discharging current is very high. These two traces should be

short, wide, and away from other traces. There should be no

other traces in parallel with these traces on any layer.

PGND Pin

PGND pin should be laid out to the negative side of the

relevant output cap with separate traces.The negative side of

the output capacitor must be close to the source node of the

bottom MOSFET. This trace is the return path of LGATE.

PHASE Pin

This trace should be short, and positioned away from other

weak signal traces. This node has a very high dV/dt with a

voltage swing from the input voltage to ground. No trace

should be in parallel with it. This trace is also the return path for

UGATE. Connect this pin to the high-side MOSFET source.

UGATE Pin

This pin has a square shape waveform with high dV/dt. It

provides the gate drive current to charge and discharge the top

MOSFET with high di/dt. This trace should be wide, short, and

away from other traces similar to the LGATE.

BOOT Pin

This pin’s di/dt is as high as the UGATE; therefore, this trace

should be as short as possible.

CSIP, CSIN Pins

The input current sense resistor connects to the CSIP and

CSIN pins through a low pass filter. The traces should be away

and guarded/shielded from the high dV/dt and di/dt nodes like

Phase, Boot.

CSOP, CSON Pins

The charging current sense resistor connects to the CSOP and

the CSON pins through a low pass filter. The traces should be

away and guarded/shielded from the high dV/dt and di/dt

nodes like PHASE, BOOT. In general, the current sense

resistor should be close to the IC.

EN Pin

This pin stays high at enable mode and low at idle mode and is

relatively robust. Enable signals should refer to the signal

ground.

DCIN Pin

This pin connects to AC adapter output voltage, and should be

less noise sensitive.

Copper Size for the Phase Node

The capacitance of PHASE should be kept very low to

minimize ringing. It would be best to limit the size of the

PHASE node copper in strict accordance with the current and

thermal management of the application.

Identify the Power and Signal Ground

The input and output capacitors of the converters, the source

terminal of the bottom switching MOSFET PGND should

connect to the power ground. The other components should

connect to signal ground. Signal and power ground are tied

together at one point.

Clamping Capacitor for Switching MOSFET

It is recommended that ceramic caps be used closely

connected to the drain of the high-side MOSFET, and the

source of the low-side MOSFET. This capacitor reduces the

noise and the power loss of the MOSFET.

ISL6257 Datasheet(PDF) 21 Page - Renesas Technology Corp

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