ISL6443 datasheet(13/18 Pages) RENESAS

13 / 18 page

ISL6443

FN9044 Rev 2.00

Page 13 of 18

Aug 9, 2006

where, IOC is the desired overcurrent protection threshold,

and RCS is a value of the current sense resistor connected

to the ISENx pin. If an overcurrent is detected for 2

consecutive clock cycles then the IC enters a hiccup mode

by turning off the gate drivers and entering into soft-start.

The IC will cycle 2 times through soft-start before trying to

restart. The IC will continue to cycle through soft-start until

the overcurrent condition is removed. Hiccup mode is active

during soft-start so care must be taken to ensure that the

peak inductor current does not exceed the overcurrent

threshold during soft-start.

Because of the nature of this current sensing technique, and

to accommodate a wide range of rDS(ON) variations, the

value of the overcurrent threshold should represent an

overload current about 150% to 180% of the maximum

operating current. If more accurate current protection is

desired place a current sense resistor in series with the

lower MOSFET source.

Over-Temperature Protection

The IC incorporates an over-temperature protection circuit

that shuts the IC down when a die temperature of 150°C is

reached. Normal operation resumes when the die

temperatures drops below 130°C through the initiation of a

full soft-start cycle.

Implementing Synchronization

The SYNC pin may be used to synchronize two or more

controllers. When the SYNC pins of two controllers are

connected together, one controller becomes the master and

the other controller synchronizes to the master. A pull-down

resistor is required and must be sized to provide a low

enough time constant to pass the SYNC pulse. Connect this

pin to VCC_5V if not used. Figure 16 shows the SYNC pin

waveform operating at 16 times the switching frequency.

Feedback Loop Compensation

To reduce the number of external components and to simplify

the process of determining compensation components, both

PWM controllers have internally compensated error

amplifiers. To make internal compensation possible several

design measures were taken.

First, the ramp signal applied to the PWM comparator is

proportional to the input voltage provided via the VIN pin.

This keeps the modulator gain constant with variation in the

input voltage. Second, the load current proportional signal is

derived from the voltage drop across the lower MOSFET

during the PWM time interval and is subtracted from the

amplified error signal on the comparator input. This creates

an internal current control loop. The resistor connected to

the ISEN pin sets the gain in the current feedback loop. The

following expression estimates the required value of the

current sense resistor depending on the maximum operating

load current and the value of the MOSFET’s rDS(ON).

Choosing RCS to provide 32µA of current to the current

sample and hold circuitry is recommended but values down

to 2µA and up to 100µA can be used.

Due to the current loop feedback, the modulator has a single

pole response with -20dB slope at a frequency determined

by the load.

where RO is load resistance and CO is load capacitance. For

this type of modulator, a Type 2 compensation circuit is

usually sufficient.

Figure 17 shows a Type 2 amplifier and its response along

with the responses of the current mode modulator and the

converter. The Type 2 amplifier, in addition to the pole at

origin, has a zero-pole pair that causes a flat gain region at

frequencies in between the zero and the pole.

FIGURE 16. SYNC WAVEFORM

RCS

IMAX

 R

DS ON



A

-------------------------------------------------



FPO

 R

O CO



---------------------------------

 R

2 C1



-------------------------------

6kHz

 R

1 C2



-------------------------------

600kHz

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