ISL6532ACR datasheet(14/18 Pages) RENESAS

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ISL6532A

FN9099 Rev 6.00

Page 14 of 18

Sep 12, 2013

C25 in Figure 7, are used. This compensation will insure a

stable system with any MOSFET given the following

conditions:

Maximum bandwidth will be realized at full load while minimum

bandwidth will be realized at no load. Bandwidth at no load will

be maximized as

 becomes closer to 10s.

Output Voltage Selection

The output voltage of the VDDQ PWM converter can be

programmed to any level between VIN and the internal

reference, 0.8V. An external resistor divider is used to scale

the output voltage relative to the reference voltage and feed it

back to the inverting input of the error amplifier, see Figure 5.

However, since the value of R1 affects the values of the rest of

the compensation components, it is advisable to keep its value

less than 5k

. Depending on the value chosen for R1, R4 can

be calculated based on the Equation 7:

If the output voltage desired is 0.8V, simply route VDDQ back

to the FB pin through R1, but do not populate R4.

The output voltage for the internal VTT linear regulator is set

internal to the ISL6532A to track the VDDQ voltage by 50%.

There is no need for external programming resistors.

As with the VDDQ PWM regulator, the AGP linear regulator

output voltage is set by means of an external resistor divider as

shown in Figure 7. For stability concerns described earlier, the

recommended value of the feedback resistor, R8, is 249. The

voltage programming resistor, R9 can be calculated based on

the Equation 8:

Component Selection Guidelines

Output Capacitor Selection - PWM Buck Converter

An output capacitor is required to filter the inductor current and

supply the load transient current. The filtering requirements are

a function of the switching frequency and the ripple current.

The load transient requirements are a function of the slew rate

(di/dt) and the magnitude of the transient load current. These

requirements are generally met with a mix of capacitors and

careful layout.

DDR memory systems are capable of producing transient load

rates above 1A/ns. High frequency capacitors initially supply

the transient and slow the current load rate seen by the bulk

capacitors. The bulk filter capacitor values are generally

determined by the ESR (Effective Series Resistance) and

voltage rating requirements rather than actual capacitance

requirements.

High frequency decoupling capacitors should be placed as

close to the power pins of the load as physically possible. Be

careful not to add inductance in the circuit board wiring that

could cancel the usefulness of these low inductance

components. Consult with the manufacturer of the load on

specific decoupling requirements.

Use only specialized low-ESR capacitors intended for

switching-regulator applications for the bulk capacitors. The

bulk capacitor’s ESR will determine the output ripple voltage

and the initial voltage drop after a high slew-rate transient. An

aluminum electrolytic capacitor’s ESR value is related to the

case size with lower ESR available in larger case sizes.

However, the Equivalent Series Inductance (ESL) of these

capacitors increases with case size and can reduce the

usefulness of the capacitor to high slew-rate transient loading.

Unfortunately, ESL is not a specified parameter. Work with

your capacitor supplier and measure the capacitor’s

impedance with frequency to select a suitable component. In

most cases, multiple electrolytic capacitors of small case size

perform better than a single large case capacitor.

Output Capacitor Selection - LDO Regulators

The output capacitors used in LDO regulators are used to

provide dynamic load current. The amount of capacitance and

type of capacitor should be chosen with this criteria in mind.

Output Inductor Selection

The output inductor is selected to meet the output voltage

ripple requirements and minimize the converter’s response

time to the load transient. The inductor value determines the

converter’s ripple current and the ripple voltage is a function of

the ripple current. The ripple voltage and current are

approximated by the following equations:

Increasing the value of inductance reduces the ripple current

and voltage. However, the large inductance values reduce the

converter’s response time to a load transient.

DRIVE2

FB2

ISL6532A

VAGP

VDDQ

FIGURE 7. COMPENSATION AND OUTPUT VOLTAGE

SELECTION OF THE LINEAR

650



R10

C25

0.8V

OUTPUT

IMPEDANCE

REFERENCE

ESR

COUT

RLOAD

VAGP

0.8

-------











COUT ESR



s



RFB

249



(EQ. 6)

R1 0.8V



VDDQ - 0.8V

------------------------------------

(EQ. 7)

R8 0.8V



VAGP - 0.8V

-----------------------------------

(EQ. 8)

I=

VIN - VOUT

Fs x L

VOUT

VIN

VOUT = I x ESR

(EQ. 9)

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