ISL8278M datasheet(21/56 Pages) RENESAS

21 / 56 page

ISL8278M

FN8924 Rev.1.00

Page 21 of 56

Aug 17, 2017

PCB Layout Guidelines

To achieve stable operation, low losses, and good thermal

performance, some layout considerations are necessary.

•For VDD > 6V, the recommended PCB layout is shown in

Figure 29. Leave V25, VDDC, VR5, and VR6 as “No Connect”.

• For 5.5V ≤ VDD ≤ 6V, connect VDDC pin to VR6 pin. For

4.5 ≤ VDD < 5.5V, connect VDDC pin to VR6 and VR5 pin. An

RC filter is required at the input of VDRVIN pin if input supply is

shared with VIN pin.

• Establish a separate SGND plane and PGND plane, then

connect SGND to the PGND plane as shown in Figure 30 in the

middle layer. For making connections between SGND/PGND

on the top layer and other layers, use multiple vias for each pin

to connect to the inner SGND/PGND layer. Do not connect

SGND directly to PGND on a top layer. Connecting SGND

directly to PGND without establishing an SGND plane will

bypass the decoupling capacitor at internal reference supplies,

making the controller susceptible to noise.

• Place enough ceramic capacitors between VIN and PGND,

VOUT and PGND and bypass capacitors between VDD and the

ground plane, as close to the module as possible to minimize

high frequency noise.

• Use large copper areas for power path (VIN, PGND, VOUT) to

minimize conduction loss and thermal stress. Also, use

multiple vias to connect the power planes in different layers.

Extra ceramic capacitors at VIN and VOUT can be placed on the

bottom layer under VIN and VOUT pads when multiple vias are

used for connecting copper pads on top and bottom layers.

• Connect differential remote-sensing traces to the regulation

point to achieve a tight output voltage regulation. Route a

trace from VSEN- and VSEN+ to the point-of-load where the tight

output voltage is desired. Avoid routing any sensitive signal

traces, such as the VSENSE signal near VSWH pads.

• For noise sensitive applications, it is recommended that the

user connect the VSWH pads only on the top layer only

(however, thermal performance gets sacrificed). External

airflow might be required to keep module heat at desired level.

For applications where switching noise is less critical, an

excellent thermal performance can be achieved in the

ISL8278M module by increasing copper mass attached to

VSWH pad. To increase copper mass on the VSWH node,

create copper islands in the middle and bottom layers under

VSWH the pad, and connect them to the top layer with multiple

vias. Make sure to shield those copper islands with a PGND

layer to avoid any interference to noise sensitive signals.

FIGURE 29. RECOMMENDED LAYOUT - TOP PCB LAYER

FIGURE 30. RECOMMENDED LAYOUT - CONNECT SGND TO PGND IN

THE MIDDLE PCB LAYER AFTER ESTABLISHING

SEPARATE SGND AND PGND

SYNC

ASCR

VSEN -

VSEN+

VDD

SGND

PGND

UVLO

PGND

PHASE

SGND

PGND

DDC

VDRVOUT

VDRVIN

CVOUT

VR55

VCC

PGND

CONNECT SGND TO PGND IN

THE MIDDLE LAYER

SGND

PGND

ISL8278M Datasheet(PDF) 21 Page - Renesas Technology Corp

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