ISL6413 datasheet(6/13 Pages) RENESAS

6 / 13 page

ISL6413

FN9129 Rev 0.00

Page 6 of 13

Oct 29, 2003

PGOOD Output Leakage Current

VOUT = 3.3V

0.01

0.1

A

PWM OUTPUT OVER VOLTAGE

Over Voltage Threshold

NOTE:

3. Specifications at -40oC and +85oC are guaranteed by design/characterization, not production tested.

4. This is the VIN current consumed when the device is active but not switching. Does not include gate drive current.

5. The dropout voltage is defined as VIN - VOUT, when VOUT is 50mV below the value of VOUT for VIN = VOUT + 0.5V.

6. The RESET timeout period is linear with CT at the slope of 2.5ms/nF. Thus, at 10nF (0.01

F) the RESET time is 25ms; at 1000nF (0.1F) the

RESET time would be 250ms.

7. Guaranteed by design, not production tested.

Electrical Specifications

Recommended operating conditions unless otherwise noted. VIN = VIN_LDO = PVCC = 3.3V, Compensation

Capacitors = 33nF for LDO1 and LDO2. TA = 25oC. (Note 2) (Continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Typical Performance Curves

FIGURE 1. PWM SOFTSTART

FIGURE 2. PWM PHASE NODE SWITCHING

FIGURE 3. PWM OUTPUT RIPPLE WAVEFORMS

FIGURE 4. PWM LOAD REGULATION

TIME (ms)

(2ms/DIV)

VIN

VOUT1

1V/DIV

TIME (

s)

(0.5

s/DIV)

1V/DIV

TIME (

s)

s/DIV)

20mV/

DIV

1.82

1.815

1.81

1.805

1.8

0.05

0.1

0.15

0.2

0.25

0.3

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