ISL6567 datasheet(21/26 Pages) RENESAS

21 / 26 page

ISL6567

FN9243 Rev 4.00

Page 21 of 26

August 9, 2011

LAYOUT CONSIDERATIONS

MOSFETs switch very fast and efficiently. The speed with which

the current transitions from one device to another causes

voltage spikes across the interconnecting impedances and

parasitic circuit elements. These voltage spikes can degrade

efficiency, radiate noise into the circuit and lead to device

overvoltage stress. Careful component layout and printed

circuit design minimizes the voltage spikes in the converter.

Consider, as an example, the turnoff transition of the upper

PWM MOSFET. Prior to turnoff, the upper MOSFET was carrying

channel current. During the turnoff, current stops flowing in the

upper MOSFET and is picked up by the lower MOSFET. Any

inductance in the switched current path generates a large

voltage spike during the switching interval. Careful component

selection, tight layout of the critical components, and short,

wide circuit traces minimize the magnitude of voltage spikes.

There are two sets of critical components in a DC/DC converter

using a ISL6567 controller. The power components are the

most critical because they switch large amounts of energy.

Next are small signal components that connect to sensitive

nodes or supply critical bypassing current and signal coupling.

Although the ISL6567 allows for external adjustment of the

channel-to-channel current balancing (via the RISEN resistors),

it is desirable to have a symmetrical layout, preferably with the

controller equidistantly located from the two power trains it

controls. Equally important are the gate drive lines (UGATE,

LGATE, PHASE): since they drive the power train MOSFETs

using short, high current pulses, it is important to size them

accordingly and reduce their overall impedance. Equidistant

placement of the controller to the two power trains also helps

keeping these traces equally long (equal impedances,

resulting in similar driving of both sets of MOSFETs).

VIA CONNECTION TO GROUND PLANE

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT PLANE LAYER

KEY

LOCATE CLOSE TO IC

FIGURE 26. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS

LOCATE NEAR LOAD

(MINIMIZE CONNECTION PATH)

ISL6567

+12VIN

COMP

GND

VCC

BOOT1

BOOT2

UGATE1

UGATE2

REFTRK

LGATE1

LGATE2

LIN

LOUT1

(CHFIN1)

CBIN1

(CHFIN2)

CBIN2

CBOOT1

CBOOT2

LOUT2

(CHFOUT)

CBOUT

RPG

(CF1)

PHASE1

PHASE2

VOUT

PGND

PVCC

(CF2)

+5VIN

MON

RFS

PGOOD

REN

HEAVY TRACE ON CIRCUIT PLANE LAYER

LOCATE NEAR SWITCHING TRANSISTORS

(MINIMIZE CONNECTION PATH)

RISEN1

ISEN1

RISEN2

ISEN2

RGND

VSEN

VDIFF

CSS

ISL6567 Datasheet(PDF) 21 Page - Renesas Technology Corp

ISL6567 Datasheet(HTML) 21 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Datasheet Download

Link URL