HIP6007

FN4307 Rev.1.00

Page 6 of 10

September 1997

3. Determine

,

where

I is the output inductor ripple current.

For an equation for the ripple current see the section under

component guidelines titled ‘Output Inductor Selection’.

A small ceramic capacitor should be placed in parallel with

presence of switching noise on the input voltage.

Application Guidelines

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These

interconnecting impedances should be minimized by using

wide, short printed circuit traces. The critical components

should be located as close together as possible using ground

plane construction or single point grounding.

Figure 5 shows the critical power components of the converter.

To minimize the voltage overshoot the interconnecting wires

indicated by heavy lines should be part of ground or power

plane in a printed circuit board. The components shown in

Figure 6 should be located as close together as possible.

numerous physical capacitors. Locate the HIP6007 within 3

inches of the MOSFETs, Q1. The circuit traces for the

MOSFETs’ gate and source connections from the HIP6007

must be sized to handle up to 1A peak current.

Figure 6 shows the circuit traces that require additional layout

consideration. Use single point and ground plane construction

for the circuits shown. Minimize any leakage current paths on

because the internal current source is only 10

A. Provide local

PHASE pins.

Feedback Compensation

Figure 7 highlights the voltage-mode control loop for a

synchronous-rectified buck converter. The output voltage

(Vout) is regulated to the Reference voltage level. The error

oscillator (OSC) triangular wave to provide a pulse-width

modulated (PWM) wave with an amplitude of Vin at the

PHASE node. The PWM wave is smoothed by the output filter

(Lo and Co).



I

 2



+



FIGURE 5. PRINTED CIRCUIT BOARD

POWER AND GROUND PLANES OR ISLANDS

UGATE

PHASE

Q1

D2

RETURN

HIP6007

+12V

HIP6007

SS

GND

BOOT

D1

Q1

D2

PHASE

FIGURE 6. PRINTED CIRCUIT BOARD

SMALL SIGNAL LAYOUT GUIDELINES

FIGURE 7. VOLTAGE - MODE BUCK CONVERTER

COMPENSATION DESIGN

OSC

REFERENCE

ESR

ERROR

AMP

PWM

DRIVER

(PARASITIC)

-

REF

R1

R3

R2

C3

C2

C1

COMP

FB

HIP6007

COMPARATOR

DRIVER

DETAILED COMPENSATION COMPONENTS

PHASE

+

-

+

-

+