HMP8154, HMP8156A

FN4343 Rev.5.00

Page 21 of 34

August 20, 2009

TABLE 18. HOST CONTROL REGISTER

BIT

NUMBER

FUNCTION

DESCRIPTION

RESET

STATE

7

Software Reset

Setting this bit to “1” initiates a software reset. It is automatically reset to a “0” after the reset

sequence is complete.

6

Power Down Enable

0 = Normal operation

1 = Power down mode

5NTSC/PAL 2

Output Mode

0 = Enabled

1 = Disabled

4

Closed Caption

Line 21

Write Status

0 = Caption_21A and Caption_21B data registers contain unused data

1 = Data has been output, host processor may now write to the registers

3

Closed Caption

Line 284

Write Status

0 = Caption_284A and Caption_284B data registers contain unused data

1 = Data has been output, host processor may now write to the registers

2NTSC/PAL 1

Output Mode

0 = Enabled

1 = Disabled

1Y/G

Output Mode

0 = Enabled

1 = Disabled

0C/B

Output Mode

0 = Enabled

1 = Disabled

TABLE 19. CLOSED CAPTION_21A DATA REGISTER

BIT

NUMBER

FUNCTION

DESCRIPTION

RESET

STATE

7-0

Line 21 Caption

Data

(First Byte)

This register is cascaded with the closed caption_21B data register and they are read out

serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A

data register is shifted out first.

TABLE 20. CLOSED CAPTION_21B DATA REGISTER

BIT

NUMBER

FUNCTION

DESCRIPTION

RESET

STATE

7-0

Line 21 Caption

Data

(Second Byte)

This register is cascaded with the closed caption_21A data register and they are read out

serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A

data register is shifted out first.

TABLE 21. CLOSED CAPTION_284A DATA REGISTER

BIT

NUMBER

FUNCTION

DESCRIPTION

RESET

STATE

7-0

Line 284 Caption

Data

(First Byte)

This register is cascaded with the closed caption_284B data register and they are read out

serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the

284A data register is shifted out first.