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ACPL-074L Datasheet(PDF) 7 Page - Broadcom Corporation.

Part # ACPL-074L
Description  Single-Channel and Dual-Channel High-Speed 15-MBd CMOS Optocoupler
PDF  11 Pages
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Manufacturer  BOARDCOM [Broadcom Corporation.]
Direct Link  http://www.broadcom.com
Logo BOARDCOM - Broadcom Corporation.

ACPL-074L Datasheet(HTML) 7 Page - Broadcom Corporation.

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Broadcom
AV02-0963EN
7
ACPL-071L and ACPL-074L Data Sheet
Single-Channel and Dual-Channel High-Speed 15-MBd CMOS Optocoupler
Switching Specifications
Over recommended temperature (TA = –40°C to +105°C), 3.0V ≤ VDD ≤ 3.6V and 4.5V ≤ VDD ≤ 5.5V.
All typical specifications are at TA = +25°C, VDD = +3.3V.
Package Characteristics
All Typical at TA = 25°C.
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Propagation Delay Time to Logic
Low Outputa
a. tPHL propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the falling edge of the VO
signal. tPLH propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the rising edge of the
VO signal.
tPHL
—29
40
ns
IF = 14 mA, CL = 15 pF, VDD = 3.3V,
CMOS Signal Levels
50
ns
IF = 14 mA, CL = 15 pF, VDD = 5V,
CMOS Signal Levels
Propagation Delay Time to Logic
High Outputa
tPLH
—22
40
ns
IF = 14 mA, CL = 15 pF, VDD = 3.3V,
CMOS Signal Levels
50
ns
IF = 14 mA, CL = 15 pF, VDD = 5V,
CMOS Signal Levels
Pulse Width
tPW
66.7
ns
Pulse Width Distortionb
b. PWD is defined as |tPHL – tPLH|.
|PWD |
0
7
25
ns
IF = 14 mA, CL = 15 pF, VDD = 3.3V,
CMOS Signal Levels
30
ns
IF = 14 mA, CL = 15 pF, VDD = 5V,
CMOS Signal Levels
Propagation Delay Skewc
c. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature within
the recommended operating conditions.
tPSK
30
ns
IF = 14 mA, CL = 15 pF, CMOS Signal Levels
Output Rise Time (10% – 90%)
tR
—20
ns
IF = 14 mA, CL = 15 pF, CMOS Signal Levels
Output Fall Time (90% - 10%)
tF
—25
ns
IF = 14 mA, CL = 15 pF, CMOS Signal Levels
Common Mode Transient Immunity
at Logic High Outputd
d. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state.
| CMH |
10
15
kV/µs VCM = 1000 V, TA = 25°C, IF = 0 mA
Common Mode Transient Immunity
at Logic Low Outpute
e. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state.
| CML |
10
15
kV/µs VCM = 1000 V, TA = 25°C, IF = 14 mA
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Input-Output Insulation
II-O
1.0
µA
45% RH, t = 5s, VI-O = 3 kV DC, TA = 25°C
Input-Output Momentary Withstand
Voltage
VISO
3750
Vrms RH 50%, t = 1 min., TA = 25°C
Input-Output Resistance
R I-O
1012
—Ω
VI-O = 500 V dc
Input-Output Capacitance
C I-O
0.6
pF
f = 1 MHz, TA = 25°C



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