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TPS3430 Datasheet(PDF) 12 Page - Texas Instruments

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Part # TPS3430
Description  Window Watchdog Timer with Programmable Reset Delay
PDF  26 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS3430 Datasheet(HTML) 12 Page - Texas Instruments

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SET0
SET1
VDD 1 = VDD 2
RATIO
1:8
1:2
tSET
SET1
VDD1 = VDD2
SET0
WDO
Disabling and
Enabling
watchdog
tRST
tWDU
tWDU
12
TPS3430
SBVS366 – JULY 2018
www.ti.com
Product Folder Links: TPS3430
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Feature Description (continued)
NOTE: There is no WDI signal in this figure, WDI is always at GND.
Figure 10. Enabling and Disabling the Watchdog Timer During a WDO Reset Event
7.3.2.1.3
SET0 and SET1 During Normal Watchdog Operation
The SET0 and SET1 pins can be used to control the window watchdog ratio of the lower boundary to the upper
boundary. There are four possible modes for the watchdog (see Table 6): disabled, 1:8 ratio, 3:4 ratio, and 1:2
ratio. If SET0 = 1 and SET1 = 0, then the watchdog is disabled. When the watchdog is disabled WDO does not
assert, and the TPS3430 ignores all inputs to WDI. The SET0 and SET1 pins can be changed when the device
is operational, but cannot be changed at the same time. If these pins are changed when the device is
operational, then there must be a 500-µs (tSET) delay between switching the two pins. If the SET0 and SET1 are
used to change the reset timing, then a reset event must occur before the new timing condition is latched. This
reset can be triggered by bringing VDD below VUVLO. Figure 11 shows how the SET0 and SET1 pins do not
change the watchdog timing option until a reset event has occurred.
Figure 11. Changing SET0 and SET1 Pins



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