TPS3431 datasheet(12/30 Pages) TI1

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TPS3431

SNVSB66 – JULY 2018

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7.4.1 VDD is Below VPOR ( VDD < VPOR)

When VDD is less than VPOR, WDO is undefined and can be either high or low. The state of WDO largely

depends on the load that the WDO pin is experiencing.

7.4.2 Above Power-On-Reset, But Less Than VDD(min) (VPOR ≤ VDD < VDD(min))

When the voltage on VDD is less than VDD(min), and greater than or equal to VPOR, the WDO signal is asserted

(logic low). When EN is logic low, the watchdog output WDO is in a high-impedance state and logic low

regardless of the WDI signal that is input to the device.

7.4.3 Normal Operation (VDD ≥ VDD(min))

When VDD is greater than or equal to VDD(min) and EN is logic high, the WDO signal is determined by WDI. When

WDI is within the watchdog timeout, the internal MOSFET turns off and WDO is pulled high through external pull-

up resistor. When WDI is not within the watchdog timeout, the internal MOSFET turns on and WDO is pulled to

logic low. When EN is logic low, ENOUT goes to logic low and WDO goes to a high-impedance state and pulls to

logic high due to the external pull-up resistor.

TPS3431 Datasheet(PDF) 12 Page - Texas Instruments