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DS26334 Datasheet(PDF) 39 Page - Dallas Semiconductor |
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DS26334 Datasheet(HTML) 39 Page - Dallas Semiconductor |
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39 / 115 page ![]() DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit 39 of 115 6 REGISTER MAPS AND DEFINITION Six address bits are used to control the settings of the registers. In the parallel nonmultiplexed mode address [5:0] is used. In multiplexed mode AD [5:0] is used and A [6:1] is used in the serial mode. The register space contains two independent sets of registers. The lower set of registers (LIUs 1-8) is located from address 00 hex to 1F hex and contains controls for LIUs 1-8. The upper set of registers (LIUs 9-16) is a duplicate of the lower set, located from address 20 hex to 3F hex that controls LIUs 9-16. Each of these sets of registers consists of 4 banks (Primary, Secondary, Individual LIU, and BERT). The ADDP register for the lower set of registers (LIUs 1-8) is located at address 1F hex. This register is used as a pointer to access the 4 banks of registers in the lower (LIUs 1- 8) register set. Similarly, the ADDP register for the upper set of registers (LIUs 9-16) is located at address 3F hex. This register is used as a pointer to access the 4 banks of registers in the upper (LIUs 9-16) register set. Setting an ADDP register to AA hex will access the Secondary bank of registers, 01 hex will access the Individual LIU bank of registers, 02 hex will access the BERT bank of registers, and 00 hex (default on power-up) will access the Primary bank of registers. Note that bank selection for the lower set of registers (LIUs 1-8) is controlled only by the ADDP at 1F hex and that bank selection for the upper set of registers (LIUs 9-16) is controlled only by the ADDP at 3F hex. |
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