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SCF5250 Datasheet(PDF) 17 Page - Motorola, Inc |
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SCF5250 Datasheet(HTML) 17 Page - Motorola, Inc |
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17 / 48 page ![]() Signal Descriptions SCF5250 Integrated ColdFire® Microprocessor Data Sheet, Rev. 1.1 Freescale Semiconductor 17 4.12 Digital Audio Interface Signals 4.13 Subcode Interface There is a 3-line subcode interface on the SCF5250. This 3-line subcode interface allows the device to format and transmit subcode in EIAJ format to a CD channel encoder device. The three signals are described in Table 10. 4.14 Analog to Digital Converter (ADC) The ADOUT signal on the ADOUT/SCLK4/GPIO58 pin provides the reference voltage in PWM format. This output requires an external integrator circuit (resistor/capacitor) to convert it to a DC level to be input to the ADREF pin. The six AD inputs are each fed to their own comparator. The reference input to each (ADREF) is then multiplexed as only one AD comparison can be made at any one time. NOTE To use the ADINx as General Purpose inputs (rather than there analogue function) it is necessary to generate a fixed comparator voltage level of VDD/2. This can be accomplished by a potential divider network connected to the ADREF pin. However in portable applications where stand-by power Table 9. Digital Audio Interface Signals Serial Module Signal Description Digital Audio In The EBUIN1/GPIO36, EBUIN2/SCLK_OUT/GPIO13, EBUIN3/CMD_SDIO2/GPIO14, and QSPI_CS0/EBUIN4/GPIO15 multiplexed signals can serve as general purpose input or can be driven by various digital audio (IEC958) input sources. Both functionalities are always active. Input chosen for IEC958 receiver is programmed within the audio module. Input value on the 4 pins can always be read from the appropriate GPIO register. Digital Audio Out The EBUOUT1/GPIO37 and QSPI_CS1/EBUOUT2/GPIO16 multiplexed pins can serve as general purpose I/O or as digital audio (IEC958) output. EBUOUT1 is digital audio out for consumer mode, EBUOUT2 is digital audio out for professional mode. During reset, the pin is configured as a digital audio output. Table 10. Subcode Interface Signal Signal name Description RCK/QSPI_DIN/QSPI_DOUT/GPIO26 Subcode clock input. When pin is used as subcode clock, this pin is driven by the CD channel encoder. QSPI_DOUT/SFSY/GPIO27 Subcode sync output This signal is driven high if a subcode sync needs to be inserted in the EFM stream. QSPI_CLK/SUBR/GPIO25 Subcode data output This signal is a subcode data out pin. |
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