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ICS85320AMILF Datasheet(PDF) 7 Page - Integrated Device Technology

Part # ICS85320AMILF
Description  LVCMOS/LVTTL-to-Differential 3.3V, 2.5V LVPECL Translator
PDF  16 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS85320AMILF Datasheet(HTML) 7 Page - Integrated Device Technology

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REVISION B 12/19/14
85320 DATA SHEET
7
LVCMOS/LVTTL-TO-DIFFERENTIAL
3.3V, 2.5V LVPECL TRANSLATOR
APPLICATION INFORMATION
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are recom-
mended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that generate
ECL/LVPECL compatible outputs. Therefore, terminating resistors
(DC current path to ground) or current sources must be used for
functionality. These outputs are designed to drive 50Ω transmission
lines. Matched impedance techniques should be used to maximize
operating frequency and minimize signal distortion. Figures 1A
and 1B show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it would
be recommended that the board designers simulate to guarantee
compatibility across all printed circuit and clock component process
variations.
TERMINATION FOR LVPECL OUTPUTS
FIGURE 1B. LVPECL OUTPUT TERMINATION
FIGURE 1A. LVPECL OUTPUT TERMINATION



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