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HMC987LP5E Datasheet(PDF) 14 Page - Analog Devices |
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HMC987LP5E Datasheet(HTML) 14 Page - Analog Devices |
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14 / 24 page ![]() For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 14 HMC987LP5E v03.1112 LOW NOISE 1:9 FANOUT BUFFER DC - 8 GHz Theory of Operation Parallel Port Control the various outputs of the can be enabled/disabled by using parallel pin control, or via the sPi. in parallel-mode (PMoDE-sEl = 1), the sPi input pins (sClk, ski, sEn) are re-interpreted as a 3-bit control bus, and enable the lVPECl drivers according to the following truth table. sClk, sDi, sEn 000: out2 001: out2 + out7 010: out2 + out7 + out4 011: out2 + out7 + out4 + out6 100: out2 + out7 + out4 + out6 + out5 101: out2 + out7 + out4 + out6 + out5 + out3 110: out2 + out7 + out4 + out6 + out5 + out3 + out8 111: out2 + out7 + out4 + out6 + out5 + out3 + out8 + out1 under sPi control (PMoDE-sEl = 0, see section “register Map” for the register map and sPi protocol details), there is slightly more lexibility in that any combination of buffers can be enabled or disabled via the individual buffer enable bits in reg02h. the part features switches on both the input and output signals, so that when the part is disabled (via either the CEn pin, or the sPi control bit reg01h[0]), the power-down current drops to < 2 µA, regardless of the io termination scheme. Input Stage the input stage, Figure 26, is lexible. it can be driven single-ended or differential, with lVPECl, lVDs, or CMl signals. if driven single-ended, a large AC coupling cap to ground should be used on the undriven input. the input impedance is selectable, via reg03h[3], between 50 Ω or 150 Ω single ended(100 Ω or 300 Ω differential). the DC bias level of 2.0 V can be generated internally by programming reg03[1]=1 (default coniguration), supplied externally, or generated via an lVPECl termination network inside the part. Chip Enable the HMC987 has a chip enable feature, CEn, which can be used to power down or deactivate the lVPECl and rF outputs. this can be done by either hardware, pin 31, or a sPi command, reg01. For a hardware selection, a logic 0 applied to CEn will power down the HMC987, however, sPi commands can still be written which will be recognized upon when a logic 1 is applied to CEn. note, there is no internal pull-up or pull-down and this pin must be terminated. to control CEn by sPi command, reg 01h[0] is set to 1, which is the default mode, and enables the outputs. When reg01[0]=0 then the outputs are disabled. Either a hardware, pin 31, or a sPi command will disable the outputs. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D |
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