ACE24AC08B

Two-wire Serial EEPROM

VER 1.1

3

Block Diagram

Pin Description

(A)

SERIAL CLOCK (SCL)

The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of

this clock is to clock data out of the EEPROM device.

(B)

SERIAL DATA LINE (SDA)

SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can

be wired- OR with other open-drain output devices.

(C)

WRITE PROTECT (WP)

The ACE24AC08B devices have a WP pin to protect the whole EEPROM array from programming.

Programming operations are allowed if WP pin is left un-connected or input to VIL. Conversely all

programming functions are disabled if WP pin is connected to VIH or VCC. Read operations is not

affected by the WP pin’s input level.

Memory Organization

The ACE24AC08B devices have 64 pages. Since each page has 16 bytes, random word addressing to

ACE24AC08B will require 10 bits data word addresses.