LPC47M192 datasheet(6/228 Pages) SMSC

6 / 228 page

SMSC DS – LPC47M192

Page 6

Rev. 03/30/05

DATASHEET

7.18.3.7

Analog Voltage Measurement....................................................................................................................... 135

7.18.3.8

Voltage ID..................................................................................................................................................... 135

7.18.3.9

Temperature Measurement............................................................................................................................ 135

7.18.3.10

Thermal / Voltage Interrupt Pin .................................................................................................................... 136

7.18.3.11

Input Safety................................................................................................................................................... 137

7.18.3.12

Layout Considerations .................................................................................................................................. 137

RUNTIME REGISTERS .....................................................................................................................139

CONFIGURATION .............................................................................................................................166

9.1

SYSTEM ELEMENTS ........................................................................................................................166

9.1.1

Primary Configuration Address Decoder ..............................................................................................166

9.1.1.1

Entering the Configuration State................................................................................................................... 166

9.1.1.2

Exiting the Configuration State..................................................................................................................... 166

9.2

CONFIGURATION SEQUENCE ...........................................................................................................167

9.2.1

Enter Configuration Mode.....................................................................................................................167

9.2.1.1

Configuration Mode ...................................................................................................................................... 167

9.2.2

Exit Configuration Mode .......................................................................................................................167

9.2.2.1

Programming Example.................................................................................................................................. 167

9.3

CHIP LEVEL (GLOBAL) CONTROL/CONFIGURATION REGISTERS [0X00-0X2F].....................................170

9.4

LOGICAL DEVICE CONFIGURATION/CONTROL REGISTERS [0X30-0XFF].............................................173

9.5

SMSC DEFINED LOGICAL DEVICE CONFIGURATION REGISTERS .......................................................178

REGISTERS FOR HARDWARE MONITORING BLOCK ..............................................................184

10.1

REGISTER SUMMARY...................................................................................................................184

10.2

INTERNAL ADDRESS REGISTER ....................................................................................................184

10.3

VALUE OR LIMIT REGISTERS (15H-3DH) .......................................................................................184

10.3.1.1

Registers 3Eh-4Fh......................................................................................................................................... 186

OPERATIONAL DESCRIPTION.....................................................................................................190

11.1

MAXIMUM GUARANTEED RATINGS................................................................................................190

11.1.1

Super I/O section (pins 1 to 100).......................................................................................................190

11.1.2

Hardware Monitoring Block (pins 101 to 128) ...................................................................................190

11.2

HARDWARE MONITORING BLOCK SPECIFICATIONS........................................................................190

11.2.1

Key Specifications.............................................................................................................................190

11.2.2

Supply Current ..................................................................................................................................190

11.2.3

Operating Temperature.....................................................................................................................190

11.2.4

Operating Voltage Ratings ................................................................................................................190

11.3

DC ELECTRICAL CHARACTERISTICS .............................................................................................191

11.3.1

Capacitance values for Pins..............................................................................................................196

TIMING DIAGRAMS .......................................................................................................................197

PACKAGE OUTLINE......................................................................................................................220

APPENDIX A – THERMAL DIODE PARAMETERS......................................................................221

APPENDIX B – ADC VOLTAGE CONVERSION...........................................................................222

APPENDIX C - TEST MODE ..........................................................................................................223

16.1

SUPER I/O BLOCK .......................................................................................................................223

16.1.1

Board Test Mode...............................................................................................................................223

16.2

HARDWARE MONITORING BLOCK .................................................................................................225

16.2.1

Board Test Mode...............................................................................................................................225

16.2.2

XNOR-Chain Test Mode ...................................................................................................................225

APPENDIX D - REFERENCE DOCUMENTS.................................................................................227

LPC47M192 REVISIONS................................................................................................................228

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