AD9705-DPG2-EBZ datasheet(34/42 Pages) AD

34 / 42 page

AD9704/AD9705/AD9706/AD9707

Data Sheet

Rev. D | Page 34 of 42

Table 20. MEMRDWR—Register 0x0F

Mnemonic

Bit No.

Direction (I/O)

Default

Description

CALSTAT

1 = calibration cycle complete

CALEN

1 = initiates device self-calibration

SMEMWR

1 = writes to static memory (calibration coefficients)

SMEMRD

1 = reads from static memory (calibration coefficients)

UNCAL

1 = resets calibration coefficients to default (uncalibrated)

Table 21. MEMADDR—Register 0x10

Mnemonic

Bit No.

Direction (I/O)

Default

Description

MEMADDR[5:0]

[5:0]

I/O

000000

Address of static memory to be accessed

Table 22. MEMDATA—Register 0x11

Mnemonic

Bit No.

Direction (I/O)

Default

Description

MEMDATA[5:0]

[5:0]

I/O

111111

Data for static memory access

REFERENCE OPERATION

The AD9704/AD9705/AD9706/AD9707 contain an internal 1.0 V

band gap reference. The internal reference can be disabled by

writing a Logic 1 to Register 0x00, Bit 0 (EXREF) in the SPI.

The internal 1.0 V band gap reference may on occasion power

up in a state that leaves the DAC output nonfunctional. To clear

this state, power up again, and check that the voltage on the

REFIO pin is within the reference output specifications shown

in Table 1 or Table 4. After the internal reference is powered up

correctly, it does not fail as long as power is applied.

To use the internal reference, decouple the REFIO pin to ACOM

with a 0.1 μF capacitor, enable the internal reference by writing

a Logic 0 to Register 0x00, Bit 0 in the SPI. (Note that this is the

default configuration.) The internal reference voltage is present

at REFIO. If the voltage at REFIO is to be used anywhere else in

the circuit, an external buffer amplifier with an input bias current of

less than 100 nA must be used to avoid loading the reference. An

example of the use of the internal reference is shown in Figure 78.

CURRENT

SCALING

x32

AD9704/AD9705/

AD9706/AD9707

DAC

IOUTFS

RSET

0.1µF

REFIO

IREF

AVSS

FS ADJ

VBG

1.0V

–

Figure 78. Internal Reference Configuration

REFIO serves as either an input or an output, depending on

whether the internal or an external reference is used. Table 23

summarizes the reference operation.

Table 23. Reference Operation

Reference

Mode

REFIO Pin

Internal

Connect 0.1 µF capacitor

(default)

External

Apply external reference

(for power saving)

An external reference can be used in applications requiring

tighter gain tolerances or lower temperature drift. Also, a variable

external voltage reference can be used to implement a method

for gain control of the DAC output. The external reference is

applied to the REFIO pin. Note that the 0.1 μF compensation

capacitor is not required. The internal reference can be directly

overdriven by the external reference, or the internal reference

can be powered down. The input impedance of REFIO is 10 kΩ

when powered up and 1 MΩ when powered down.

REFERENCE CONTROL AMPLIFIER

The AD9704/AD9705/AD9706/AD9707 contain a control

amplifier that regulates the full-scale output current, IOUTFS. The

control amplifier is configured as a V-I converter, as shown in

Figure 78. The output current, IREF, is determined by the ratio of

the VREFIO and an external resistor, RSET, as stated in Equation 4.

IREF is mirrored to the segmented current sources with the

proper scale factor to set IOUTFS, as stated in Equation 3.

The control amplifier allows a 5:1 adjustment span of IOUTFS from

1 mA to 5 mA by setting IREF between 31.25 μA and 156.25 μA

(RSET between 6.4 kΩ and 32 kΩ). The wide adjustment span of

IOUTFS provides several benefits. The first relates directly to the

power dissipation of the AD9704/AD9705/AD9706/AD9707,

which is proportional to IOUTFS (see the Power Dissipation section).

The second benefit relates to the ability to adjust the output over a

14 dB range, which is useful for controlling the transmitted power.

AD9705-DPG2-EBZ Datasheet(PDF) 34 Page - Analog Devices

AD9705-DPG2-EBZ Datasheet(HTML) 34 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Datasheet Download

Link URL