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US2236060BL-S08-R Datasheet(PDF) 4 Page - Unisonic Technologies

Part # US2236060BL-S08-R
Description  ULTRA-SMALL, LOW-INPUT VOLTAGE LOW RON LOAD SWITCH
PDF  5 Pages
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Manufacturer  UTC [Unisonic Technologies]
Direct Link  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

US2236060BL-S08-R Datasheet(HTML) 4 Page - Unisonic Technologies

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US2236060B
Preliminary
LINEAR INTEGRATED CIRCUIT
UNISONICTECHNOLOGIESCO.,LTD
4 of 5
www.unisonic.com.tw
QW-R129-030.b
APPLICATION INFORMATION
ON/OFF Control
The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic threshold. It can be used with any microcontroller with 1.2V, 1.8V, 2.5V, or 3.3V GPIOs.
Input Capacitor
To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-μF ceramic
capacitor, CIN, place close to the pins is usually sufficient. Higher values of CIN can be use to further reduce the
voltage drop during high-current application. When switching heavy loads, it is recommended to have an input
capacitor approximately ten times higher than the output capacitor to avoid excessive voltage drop.
Output Capacitor
Due to the integrated body diode in the PMOS switch, a CIN greater than CL is highly recommended. A CL greater
than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through
the body diode from VOUT to VIN. A CIN to CL ratio of at least 10 to 1 is recommended for minimizing VIN dip caused by
inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required for proper functionality of the
device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dip at turn on due to inrush
currents.
Board Layout
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on
normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with
minimizing the case to ambient thermal impedance.



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