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L8602G-Q20-4040-R Datasheet(PDF) 5 Page - Unisonic Technologies

Part # L8602G-Q20-4040-R
Description  LOW POWER 6 STAGE FET LNA AND MIXER BIAS CONTROLLER
PDF  8 Pages
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Manufacturer  UTC [Unisonic Technologies]
Direct Link  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

L8602G-Q20-4040-R Datasheet(HTML) 5 Page - Unisonic Technologies

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L8602
Preliminary
LINEAR INTEGRATED CIRCUIT
UNISONIC TECHNOLOGIES CO., LTD
5 of 8
www.unisonic.com.tw
QW-R123-023.a
ELECT RI CAL CH ARACT ERI ST I CS (Cont .)
(Measured at TA=25°C, VCC=3.3V(Note 1), R CAL1=RCAL2=36K
Ω (setting ID1/2/4/5 to 10mA), RCALM=68KΩ (setting
ID3/6 to 5mA) unless otherwise stated)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RCAL (1 and 2)
Disable Threshold (Note 1)
VRCAL(DIS)
1.8
2.7
3.0
V
Input Current
IRCAL(DIS)
VRCAL=3.0V
1.7
10
uA
RCALM
Disable Threshold (Note 1)
RCALM(DIS)
1.5M
3.3M
5.0M
RCALM Range
RCALM
39k
390k
Voltage and Temperature dependence (RCALM not present)
delta ID vs. VCC
dID/dVCC
VCC=3.3 to 8.0V
1.2
%/V
delta ID vs. TOP
dID/dTOP
TOP=-40°C to +85°C
0.05
%/°C
delta VD vs. VCC
dVD/dVCC
VCC=3.3 to 8.0V
0.05
%/V
delta VD vs. TOP
dVD/dTOP
TOP=-40°C to +85°C
50
ppm/°
C
Output Noise
Drain Voltage
VD(NOISE)
CGATE-GND=10nF,
CDRAIN-GND=10nF
0.02
Vpk-pk
Gate Voltage
VG(NOISE)
CGATE-GND=10nF,
CDRAIN-GND=10nF
0.005 Vpk-pk
Notes: 1. To disable FET stages 3 and 6, pin RCAL2 must be set to 3V or above and pin RCALM should be open circuit.
2. The characteristics are measured using up to three external reference resistors, RCAL1, RCAL2 and RCALM,
wired from pins RCAL1/2/M to ground. Resistor RCAL1 sets the drain current of FETs 1 and 4. If RCALM is not
present, resistor RCAL2 sets the drain currents of FETs 2, 3, 5 and 6. If RCALM is present, resistor RCAL2 sets
the drain currents of FETs 2 and 5 and RCALM sets the drain currents of FETs 3 and 6.
3. The negative bias voltages are generated on-chip using an internal oscillator. Two external capacitors,
CNB and CSUB of value 47nF are required for this purpose.
4. The QFN-20(4×4) package exposed pad must either be connected to Csub or left open circuit.
5. Noise voltage measurements are made with FETs and gate and drain capacitors of value 10nF in place.
Noise voltages are not measured in production.
6. ESD sensitive, handling precautions are recommended.



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