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PS8171A

03/05/03

PI74ALVCH16270

PI74ALVCH16270

PI74ALVCH16270

PI74ALVCH16270

PI74ALVCH16270

12-Bit To 24-Bit

12-Bit To 24-Bit

12-Bit To 24-Bit

12-Bit To 24-Bit

12-Bit To 24-Bit Registered Bus Exchanger

Registered Bus Exchanger

Registered Bus Exchanger

Registered Bus Exchanger

Registered Bus Exchanger with 3-State Outputs

with 3-State Outputs

with 3-State Outputs

with 3-State Outputs

with 3-State Outputs

Inputs

Outputs

CLK

OEA

OEB

A

1B, 2B

­

HH

Z

Z

­

HL

Z

Active

­

LH

Active

Z

­

L

L

Active

Active

Inputs

Outputs

A

CLKEN1B CLKEN2B CLK

SEL

1B

2B

HX

X

H

XX

XH

X

L

X

X

LX

­H

LX

L

LX

­H

HX

H

XL

­

LX

L

L

XL

­

LX

H

H

INPUTS

OUTPUTS

CLKENA1 CLKENA2 CLK

A

1B

2B

LH

X

X

LH

X

X

LL

­

L

LL

­

H

HL

­

L

HL

­

H

HH

X

X

Pin Name

Pin Name

Pin Name

Pin Name

Pin Name

Description

Description

Description

Description

Description

OE

Output Enable Input (Active LOW)

C L K

Clock

S E L

Select (Active Low)

CLKEN

Clock Enable (Active Low)

A,1B,2B

3-StateOutputs

GND

Ground

Power

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

25

26

27

28

32

31

30

29

Product Pin Description

Product Pin Description

Product Pin Description

Product Pin Description

Product Pin Description

Notes:

Notes:

Notes:

Notes:

Notes:

1. H = High Signal Level

L

=

Low Signal Level

X = Irrelevant

Z = High Impedance

↑ = Transition, Low to High

2. Two CLK edges are needed to propagate data.

3. Output level before the indicated steady state

input conditions were established.

Product Pin Configuration

Product Pin Configuration

Product Pin Configuration

Product Pin Configuration

Product Pin Configuration

56-PIN

56-PIN

56-PIN

56-PIN

56-PIN

A56

A56

A56

A56

A56

V56

V56

V56

V56

V56

OEA

CLKEN1B

2B3

GND

2B2

2B1

VCC

A1

A2

A3

GND

A4

A5

A6

A7

A8

A9

GND

A10

A11

A12

VCC

1B1

1B2

GND

1B3

CLKEN2B

SEL

OEB

CLKENA2

2B4

GND

2B5

2B6

VCC

2B7

2B8

2B9

GND

2B10

2B11

2B12

1B12

1B11

1B10

GND

1B9

1B8

1B7

VCC

1B6

1B5

GND

1B4

CLKENA1

CLK

Truth Tables

Truth Tables

Truth Tables

Truth Tables

A to B Storage (OEB = L)

A to B Storage (OEB = L)

A to B Storage (OEB = L)

A to B Storage (OEB = L)

A to B Storage (OEB = L)

B to A Storage (OEA = L)

B to A Storage (OEA = L)

B to A Storage (OEA = L)

B to A Storage (OEA = L)

B to A Storage (OEA = L)