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LTC2637 Datasheet(PDF) 21 Page - Analog Devices

Part # LTC2637
Description  Octal 12-/10-/8-Bit I2C VOUT DACs Reference
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC2637 Datasheet(HTML) 21 Page - Analog Devices

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LTC2637
21
Rev D
For more information www.analog.com
OPERATION
Acknowledge
The Acknowledge (ACK) signal is used for handshaking
between the master and the slave. An ACK (active LOW)
generated by the slave lets the master know that the lat-
est byte of information was properly received. The ACK
related clock pulse is generated by the master. The master
releases the SDA line (HIGH) during the ACK clock pulse.
The slave-receiver must pull down the SDA bus line dur-
ing the ACK clock pulse so that it remains a stable LOW
during the HIGH period of this clock pulse. The LTC2637
responds to a write by a master in this manner but does
not acknowledge a read operation; in that case, SDA is
retained HIGH during the period of the ACK clock pulse.
Chip Address
The state of pins CA0, CA1 and CA2 (CA1 and CA2 are
only available on the MSOP package) determines the
slave address of the part. These pins can each be set to
any one of three states: VCC, GND or float. This results
in 27 (MSOP Package) or 3 (DFN Package) selectable
addresses for the part. The slave address assignments
are shown in Tables 1 and 2.
In addition to the address selected by the address pins,
the part also responds to a global address. This address
allows a common write to all LTC2637 parts to be accom-
plished using one 3-byte write transaction on the I2C bus.
The global address, listed at the end of Tables 1 and 2, is
a 7-bit hardwired address not selectable by CA0, CA1 or
CA2. If another global address is required, please consult
the factory.
The maximum capacitive load allowed on the address pins
(CA0, CA1 and CA2) is 10pF, as these pins are driven
during address detection to determine if they are floating.
Table 1. Slave Address Map (MSOP Package)
CA2
CA1
CA0
A6
A5
A4
A3
A2
A1
A0
GND
GND
GND
0
0
1
0
0
0
0
GND
GND
FLOAT
0
0
1
0
0
0
1
GND
GND
VCC
0
0
1
0
0
1
0
GND
FLOAT
GND
0
0
1
0
0
1
1
GND
FLOAT FLOAT
0
1
0
0
0
0
0
GND
FLOAT
VCC
0
1
0
0
0
0
1
GND
VCC
GND
0
1
0
0
0
1
0
GND
VCC
FLOAT
0
1
0
0
0
1
1
GND
VCC
VCC
0
1
1
0
0
0
0
FLOAT
GND
GND
0
1
1
0
0
0
1
FLOAT
GND
FLOAT
0
1
1
0
0
1
0
FLOAT
GND
VCC
0
1
1
0
0
1
1
FLOAT FLOAT
GND
1
0
0
0
0
0
0
FLOAT FLOAT FLOAT
1
0
0
0
0
0
1
FLOAT FLOAT
VCC
1
0
0
0
0
1
0
FLOAT
VCC
GND
1
0
0
0
0
1
1
FLOAT
VCC
FLOAT
1
0
1
0
0
0
0
FLOAT
VCC
VCC
1
0
1
0
0
0
1
VCC
GND
GND
1
0
1
0
0
1
0
VCC
GND
FLOAT
1
0
1
0
0
1
1
VCC
GND
VCC
1
1
0
0
0
0
0
VCC
FLOAT
GND
1
1
0
0
0
0
1
VCC
FLOAT FLOAT
1
1
0
0
0
1
0
VCC
FLOAT
VCC
1
1
0
0
0
1
1
VCC
VCC
GND
1
1
1
0
0
0
0
VCC
VCC
FLOAT
1
1
1
0
0
0
1
VCC
VCC
VCC
1
1
1
0
0
1
0
GLOBAL ADDRESS
1
1
1
0
0
1
1
Table 2. Slave Address Map (DFN Package)
CA0
A6
A5
A4
A3
A2
A1
A0
GND
0
0
1
0
0
0
0
FLOAT
0
0
1
0
0
0
1
VCC
0
0
1
0
0
1
0
GLOBAL ADDRESS
1
1
1
0
0
1
1



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