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MM74HC08 Datasheet(PDF) 2 Page - ON Semiconductor |
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MM74HC08 Datasheet(HTML) 2 Page - ON Semiconductor |
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2 / 9 page ![]() ©1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC08 Rev. 1.4.0 February 2008 MM74HC08 Quad 2-Input AND Gate Features ■ Typical propagation delay: 7ns (tPHL), 12ns (tPLH) ■ Fanout of 10 LS-TTL loads ■ Quiescent power consumption: 2µA maximum at room temperature ■ Low input current: 1µA maximum General Description The MM74HC08 AND gates utilize advanced silicon- gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. The HC08 has buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the stan- dard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Ordering Information Device also available in Tape and Reel except for N14A. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Top View Order Number Package Number Package Description MM74HC08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC08SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC08N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide |
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