ZXLD1370Q

Document number: DS37117 Rev. 4 - 2

32 of 39

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February 2018

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ZXLD1370Q

PCB Layout Considerations

PCB layout is a fundamental activity to get the most of the device in all configurations. In the following section, it is possible to find some important

insight to design with the ZXLD1370Q both in Buck and Buck-Boost configurations.

Figure 39 Circuit Layout

Here are some considerations useful for the PCB layout:



In order to avoid ringing due to stray inductances, the inductor L1, the anode of D1 and the drain of Q1 should be placed as close together as

possible.



The shaping capacitor C1 is fundamental for the stability of the control loop. To this end it should be placed no more than 5mm from the SHP

pin.



In addition to these capacitors, it is suggested to add two ceramic capacitors of 1F, X7R, 100V each (C2, C8), as well as a further decoupling

capacitor of 100nF close to the VIN/VAUX pins (C9). VIN and VAUX pins can be short-circuited when the device is used in buck mode, or

can be driven from a separate supply.

SHP Pin

Decoupling

Inductor, Switch and

Freewheeling Diode