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HD6417034B Datasheet(PDF) 21 Page - Renesas Technology Corp |
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HD6417034B Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 691 page  Section Page Description Edition A.3 Register Status in Reset and Power- Down States Table A.77 Register Status in Reset and Power-Down States 644 *2 added Watchdog timer (WDT) TCNT Initialized Initialized Held Held TCSR *1 RSTCR* 2 Initialized Serial communication SMR Initialized Initialized Initialized Held interface (SCI) BRR SCR TDR TSR Held SSR Initialized RDR RSR Held Notes: *1 Bits 7–5 (OVF, WT/IT, TME) are initialized, bits 2–0 (CKS2–CKS0) are held. *2 Not initialized in the case of a reset by the WDT. 6 |
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