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DSP56857 Datasheet(PDF) 393 Page - Freescale Semiconductor, Inc

Part # DSP56857
Description  Digitial Signal Controller
PDF  662 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56857 Datasheet(HTML) 393 Page - Freescale Semiconductor, Inc

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Functional Description
Time-Of-Day (TOD), Rev. 4
Freescale Semiconductor
14-7
14.5.3 Stop Mode
During Stop Mode the TOD module will continue to operate normally. The TOD interrupts will
still activate and can wake the processor up for TOD related processing.
14.5.4 General Information
The TOD alarms sub block is used to generate TOD IRQ signals. The TOD alarm registers
TODSAL, TODMAL, TODHAL, and TODDAL, along with TOD Control/Status register
(TODCS), are implemented in this sub block.
TOD generates two interrupt signals:
1. TOD Alarm Interrupt
2. TOD Second Interrupt
Both interrupt signals can wake up the device from its Stop mode.
14.5.5 Alarm Interrupt Flag and Outputs
The alarm interrupt feature provides a flexible means of detecting events based on time-of-day.
The TOD module contains alarm registers for seconds, minutes, hours, and days. The control and
status register contains individual enables for each of these registers (TODSA, TODMA,
TODHA, TODDA) as well as an overall Alarm Interrupt Enable (TODAEN). An alarm interrupt
triggers during the time-of-day counting process. This interrupt occurs when at least one of the
alarm enables is set and the TODAEN is set.
All alarm registers can be enabled to generate an alarm at a designated time. All enabled alarm
registers must match the corresponding time registers before the TOD alarm interrupt IRQ is
generated. For example, if the minutes and hour alarms are enabled, then both the minutes and
hours registers must match the respective alarm registers before the IRQ will occur.
The alarm interrupt triggers one TOD input clock period after the TOD_CLK edge, advancing
the time-of-day counters to their activation value. To minimize latency, it is preferable to
generate a faster TOD input clock and use a correspondingly higher value in the TOD module’s
clock scaler register. The alarm interrupt will not trigger until TODEN is set to one and all
enabled alarm registers match the time-of-day counters. The interrupt will function in the Stop
mode; however, the TOD module must be configured and enabled prior to entering the Stop
mode.
Every time the alarm interrupt triggers the TOD Alarm interrupt occurred flag (TODAL) in the
Control Status register is set. The TODAL is cleared by writing 0 to it while it contains 1. The
interrupt will not be taken unless it is also enabled in the interrupt controller module.



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