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DSP56857 Datasheet(PDF) 423 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 423 Page - Freescale Semiconductor, Inc |
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423 / 662 page ![]() Register Descriptions General Purpose Input/Output (GPIO), Rev. 4 Freescale Semiconductor 15-23 15.8.28 Port D Pull-Up Enable Register (GPIOD_PUER) Figure 15-37. Port D Pull-Up Enable Register (GPIOD_PUER) See Programmer’s Sheet on Appendix page B - 132 15.8.28.1 Reserved—Bits 15–6 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.28.2 Pull-Up Enable (PUE)—Bits 5–0 These bits control whether pull-ups are enabled for inputs in either Normal or GPIO mode. Pull ups are automatically disabled for outputs in both modes. • 0 = Pull ups disabled for inputs • 1 = Pull ups enabled for inputs (default) 15.8.29 Port E Pull-Up Enable Register (GPIOE_PUER) Figure 15-38. Port E Pull-Up Enable Register (GPIOE_PUER) See Programmer’s Sheet on Appendix page B - 133 15.8.29.1 Reserved—Bits 15–4 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.29.2 Pull-Up Enable (PUE)—Bits 3–0 These bits control whether pull-ups are enabled for inputs in either Normal or GPIO mode. Pull ups are automatically disabled for outputs in both modes. • 0 = Pull ups disabled for inputs • 1 = Pull ups enabled for inputs (default) Base + $3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 PUE Write Reset 11 111 111 1 1 1 1 1 1 1 1 Base + $3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 PUE Write Reset 11 111 111 1 1 1 1 1 1 1 1 |
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