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DSP56857 Datasheet(PDF) 429 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 429 Page - Freescale Semiconductor, Inc |
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429 / 662 page ![]() Features Host Interface Eight (HI8), Rev. 4 Freescale Semiconductor 16-3 16.1 Introduction The Host Interface Eight (HI8) is a byte-wide, full-duplex, double-buffered, parallel port able to be connected directly to the data bus of a Host Processor. The HI8 supports a variety of buses, and provides connection with a number of industry standard DSCs, microcomputers, and microprocessors. Because the host bus can operate asynchronously to the core clock, the HI8 registers are divided into two banks: 1. The Host Side bank is accessible to the external Host 2. The DSC Side bank is accessible to the core The HI8 supports two classes of interfaces: 1. Host Processor/MCU connection interface 2. General Purpose Input/Output (GPIO) port HI8 port pins not configured for peripheral use can be configured as GPIO pins. 16.2 Features 16.2.1 Dgital Signal Controller (DSC) Side • Four internal data I/O-mapped locations • Sixteen-bit data word • Transfer modes —DSC-to-Host — Host-to-DSC — Host command • Handshaking protocols — Software polled — Interrupt driven — DMA accesses. • Instructions — Memory mapped registers allow the standard MOVE instruction to be used. — Bit addressing instructions (i.e., BFCHG, BFCLR, BFSET, BFTSTH, BFTSTL, BRCLR, BRSET) simplify I/O service routines. |
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