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DSP56857 Datasheet(PDF) 521 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 521 Page - Freescale Semiconductor, Inc |
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521 / 662 page ![]() Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-19 COP Timeout Register (COPTO) $1FFFD0 + $1 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read TIMEOUT Write Reset 1111 11111 11 1111 1 2 of 3 COP COP Time-Out Register (COPTO) Bits Name Description 15 - 0 TIMEOUT COP Time-Out Period This register determines the time-out period of the COP counter. TIMEOUT should be written before the COP is enabled. Once the COP is enabled, the recommended procedure for changing TIMEOUT is to disable the COP, write to COPTO, then re-enable the COP, ensuring the new TIMEOUT is loaded into the counter. Alternatively, the CPU can write to COPTO, then write the proper patterns to COPCTR, causing the counter to reload with the new TIMEOUT value. The COP counter is not reset by a write to COPTO. Changing TIMEOUT while the COP is enabled will result in a time-out period differing from the expected value. These bits can only be changed when the CWP bit is set to zero. |
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