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DSP56857 Datasheet(PDF) 527 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 527 Page - Freescale Semiconductor, Inc |
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527 / 662 page ![]() Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-25 5 of 24 ITCN Interrupt Priority Register 3 (IPR3) Bits Name Description 15 - 14 ESSI0_TD IPL ESSI0 Transmit Data Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 13 - 12 ESSI0_TDES IPL ESSI0 Transmit Data with Exception Status Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 11 - 10 ESSIO_RLS IPL ESSIO Receive Last Slot Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 9 - 8 ESSI0_RD IPL ESSI0 Receive Data Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 Interrupt Priority Register 3 (IPR3) $1FFF20 + $3 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read ESSI0_TD IPL ESSI0_TDES IPL ESSIO_RLS IPL ESSI0_RLS IPL ESSI_RDES IPL DMA5 IPL DMA4 IPL DMA3 IPL Write Reset 00 0 0 00 0000 000 000 denotes Reserved Bits See the following page for continuation of this register |
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