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DSP56857 Datasheet(PDF) 559 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 559 Page - Freescale Semiconductor, Inc |
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559 / 662 page ![]() Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-57 5 of 9 SCI SCI Control Register 2 (SCISR2) SCI Control Register 2 (SCICR2) Base + $2 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 0 0 0 0 0 0 0 0 0 0 0 0 0 RIIE TDE RDE Write RESET 00 00 00 00 00 00 00 00 Bits Name Description 2 RIIE Receiver Idle Interrupt Enable This bit is used to inform the processor a message has completed when using DMA in a wake-up mode of operation. The receiver is normally configured until a message is detected. 1 TDE Transmitter DMA Enable Setting this bit allows transmit DMA requests to the DMA controller. Fro transmit DMA operation, this bit must be set and a DMA channel must be enabled to utilize the request. 0 Transmit DMA disabled 1 Transmit DMA enabled 0 RDE Receiver DMA Enable Setting this bit allows received DMA requests to the DMA controller. For receive DMA operation, this bit must be set and a DMA channel must be enabled to utilize the request. 0 Receive DMA disabled 1 Receive DMA enabled denotes Reserved Bits |
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