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DSP56857 Datasheet(PDF) 593 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 593 Page - Freescale Semiconductor, Inc |
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593 / 662 page ![]() Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-91 Preliminary TMR 8 of 11 TMR Control Register (CTL) $1FFE80 + $6, $E, $16, $1E Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read CM PCS SCS ONCE LENGTH DIR EXT INIT OM (OFLAG) Write Reset 0 0 0 0 0 0 0 0 0 0 0 000 0 0 TMRA0_CTRL (Timer A, Channel 0 Control)—Address: TMRA_BASE + $6 TMRA1_CTRL (Timer A, Channel 1 Control)—Address: TMRA_BASE + $E TMRA2_CTRL (Timer A, Channel 2 Control)—Address: TMRA_BASE + $16 TMRA3_CTRL (Timer A, Channel 3 Control)—Address: TMRA_BASE + $1E TMR Control Register (CTL) continued Bits Name Description 8 - 7 SCS Secondary Source This bit field provides additional information used for counting, such as direction. 00 Counter 0 input pin (TIO0) 01 Counter 1 input pin (TIO1) 10 Counter 2 input pin (TIO2) 11 Counter 3 input pin (TIO3) 6 ONCE Count Once This bit selects continuous or one-shot counting mode. 0 Count repeatedly 1 Count until compare, then stop. Counting up: compares when counter reaches CMP1 value. Counting down: compares when counter reaches CMP2 value. 5 LENGTH Count Length Determines whether counter counts to the compare value, reinitializing itself. 0 Roll-over 1 Count until compare, then reinitialize See the following page for continuation of this register |
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