FTLF1318P2xCL Commercial Temp. SFP Product Specification – October 2006

F i n i s a r

© Finisar Corporation October 27, 2006 Rev. C

Page 2

I.

Pin Descriptions

Pin

Symbol

Name/Description

Ref.

1

Transmitter Ground (Common with Receiver Ground)

1

2

Transmitter Fault. Not supported.

3

Transmitter Disable. Laser output disabled on high or open.

2

4

MOD_DEF(2)

Module Definition 2. Data line for Serial ID.

3

5

MOD_DEF(1)

Module Definition 1. Clock line for Serial ID.

3

6

MOD_DEF(0)

Module Definition 0. Grounded within the module.

3

7

Rate Select

No connection required

4

8

LOS

Loss of Signal indication. Logic 0 indicates normal operation.

5

9

Receiver Ground (Common with Transmitter Ground)

1

10

Receiver Ground (Common with Transmitter Ground)

1

11

Receiver Ground (Common with Transmitter Ground)

1

12

RD-

Receiver Inverted DATA out. AC Coupled

13

RD+

Receiver Non-inverted DATA out. AC Coupled

14

Receiver Ground (Common with Transmitter Ground)

1

15

Receiver Power Supply

16

Transmitter Power Supply

17

Transmitter Ground (Common with Receiver Ground)

1

18

TD+

Transmitter Non-Inverted DATA in. AC Coupled.

19

TD-

Transmitter Inverted DATA in. AC Coupled.

20

Transmitter Ground (Common with Receiver Ground)

1

Notes:

1.

Circuit ground is internally isolated from chassis ground.

2.

3.

Should be pulled up with 4.7k - 10 kohms on host board to a voltage between 2.0V and 3.6V.

MOD_DEF(0) pulls line low to indicate module is plugged in.

4.

Finisar FTLFxx18xxxxx transceivers operate at 1x Fibre Channel and Gigabit Ethernet data rates and

respective protocols without active control.

5.

LOS is open collector output. Should be pulled up with 4.7k – 10 kohms on host board to a voltage

between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.

VeeT

VeeT

VeeR

VeeR

TD-

TD+

RD+

RD-

VccT

VccR

VeeT

VeeR

TXFault

MOD-DEF(2)

MOD-DEF(1)

MOD-DEF(0)

Rate Select

LOS

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

Towards

ASIC

Towards

Bezel

TX Disable

VeeR

Pinout of Connector Block on Host Board