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908E626 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc |
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908E626 Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 38 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 21 908E626 FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Table 3. List of Registers Slave Status Byte Contains the contents of the System Status Register ($0c) independent of whether it is a write or read operation or which register was selected. Slave Data Byte Contains the contents of selected register. During a write operation it includes the register content prior to a write operation. SPI Register Overview Table 3 summarizes the SPI Register addresses and the bit names of each register. ANALOG DIE I/OS LIN Physical Layer The LIN bus terminal provides a physical layer for single- wire communication in automotive applications. The LIN physical layer is designed to meet the LIN physical layer specification. The LIN driver is a low-side MOSFET with internal current limitation and thermal shutdown. An internal pullup resistor with a serial diode structure is integrated, so no external pullup components are required for the application in a slave node. The fall time from dominant to recessive and the rise time from recessive to dominant is controlled. The symmetry between both slew rate controls is guaranteed. The LIN terminal offers high susceptibility immunity level from external disturbance, guaranteeing communication during external disturbance. The LIN transmitter circuitry is enabled by setting the PSON bit in the System Control Register (SYSCTL). If the transmitter works in the current limitation region, the LINCL bit in the System Status Register (SYSSTAT) is set. Due to excessive power dissipation in the transmitter, software is advised to monitor this bit and turn the transmitter off immediately. Addr Register Name R/W Bit 76543210 $01 H-Bridge Output (HBOUT) R HB4_H HB4_L HB3_H HB3_L HB2_H HB2_L HB1_H HB1_L W $02 H-Bridge Control (HBCTL) R OFC_EN CSA 000 CLS2 CLS1 CLS0 W $03 System Control (SYSCTL) R PSON SRS1 SRS0 0000 0 W $04 Interrupt Mask (IMR) R 0 0 LINIE HTIE LVIE HVIE OCIE 0 W $05 Interrupt Flag (IFR) R 0 0 LINF HTF LVF HVF OCF 0 W $06 Reset Mask (RMR) R TTEST 00000 HVRE HTRE W $07 Analog Multiplexer Configuration (ADMUX) R 0000 SS3 SS2 SS1 SS0 W $08 Reserved R 00000 000 W $09 Reserved R 00000000 W $0a AWD Control (AWDCTL) R 000 AWDRE 0 0 AWDF AWDR W AWDRST $0b Power Output (POUT) R0 0 0000 HVDDON 0 W $0c System Status (SYSSTAT) R 0 LINCL HVDD_OCF 0 LVF HVF HB_OCF HTF W |
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