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P8XCE598 Datasheet(PDF) 13 Page - NXP Semiconductors |
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P8XCE598 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 108 page ![]() 1996 Jun 27 13 Philips Semiconductors Product specification 8-bit microcontroller with on-chip CAN P8xCE598 7.2.1 MAIN RAM Four 8-bit register banks occupy the lower RAM area, • BANK 0: location 0 to 7 • BANK 1: location 8 to 15 • BANK 2: location 16 to 23 • BANK 4: location 24 to 31. Only one of these banks may be enabled at the same time. The next 16 bytes, locations 32 through 45, contains 128 directly addressable bit locations. The stack can be located anywhere in the internal Main RAM address space. The stack depth is only limited by the internal RAM space available. All registers except the program counter and the four 8-bit register banks reside in the SFR address space. MGA152 7F 7E 7D 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 18H 17H 10H 0FH 08H 07H 00H 24 23 31 16 15 8 7 0 BANK 0 BANK 1 BANK 2 BANK 3 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 (MSB) (LSB) 127 7FH 2FH 2EH 2DH 2CH 2BH 2AH 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 1FH Fig.5 Internal MAIN RAM bit addresses. 7.3 External Data Memory An access to external Data Memory locations higher than 255 will be performed with the MOVX @DPTR instructions in the same way as in the 80C51 structure, i.e.with P0 and P2 as data/address bus and P3.6 and P3.7 as Write and Read strobe signals. Note that these external Data Memory locations cannot be accessed with R0 or R1 as address pointer. |
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