PIC18F4520ESLASHMLQTP datasheet(207/390 Pages) MICROCHIP

207 / 390 page

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 205

PIC18F2420/2520/4420/4520

18.1

Baud Rate Generator (BRG)

The BRG is a dedicated 8-bit or 16-bit generator that

supports both the Asynchronous and Synchronous

modes of the EUSART. By default, the BRG operates

in 8-bit mode; setting the BRG16 bit (BAUDCON<3>)

selects 16-bit mode.

The SPBRGH:SPBRG register pair controls the period

of a free running timer. In Asynchronous mode, bits

BRGH (TXSTA<2>) and BRG16 (BAUDCON<3>) also

control the baud rate. In Synchronous mode, BRGH is

ignored. Table 18-1 shows the formula for computation

of the baud rate for different EUSART modes which

only apply in Master mode (internally generated clock).

Given the desired baud rate and FOSC, the nearest

integer value for the SPBRGH:SPBRG registers can be

calculated using the formulas in Table 18-1. From this,

the error in baud rate can be determined. An example

calculation is shown in Example 18-1. Typical baud

rates and error values for the various Asynchronous

modes are shown in Table 18-2. It may be advan-

tageous to use the high baud rate (BRGH = 1) or the

16-bit BRG to reduce the baud rate error, or achieve a

slow baud rate for a fast oscillator frequency.

Writing a new value to the SPBRGH:SPBRG registers

causes the BRG timer to be reset (or cleared). This

ensures the BRG does not wait for a timer overflow

before outputting the new baud rate.

18.1.1

OPERATION IN POWER MANAGED

MODES

The device clock is used to generate the desired baud

rate. When one of the power managed modes is

entered, the new clock source may be operating at a

different frequency. This may require an adjustment to

the value in the SPBRG register pair.

18.1.2

SAMPLING

The data on the RX pin is sampled three times by a

majority detect circuit to determine if a high or a low

level is present at the RX pin.

TABLE 18-1:

BAUD RATE FORMULAS

Configuration Bits

BRG/EUSART Mode

Baud Rate Formula

SYNC

BRG16

BRGH

8-bit/Asynchronous

FOSC/[64 (n + 1)]

8-bit/Asynchronous

FOSC/[16 (n + 1)]

16-bit/Asynchronous

FOSC/[4 (n + 1)]

8-bit/Synchronous

16-bit/Synchronous

Legend: x = Don’t care, n = value of SPBRGH:SPBRG register pair

PIC18F4520E/MLQTP Datasheet(PDF) 207 Page - Microchip Technology

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