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PIC18F4520E/MLQTP Datasheet(PDF) 294 Page - Microchip Technology

Part # PIC18F4520E/MLQTP
Description  28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  390 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4520E/MLQTP Datasheet(HTML) 294 Page - Microchip Technology

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PIC18F2420/2520/4420/4520
DS39631A-page 292
Preliminary
 2004 Microchip Technology Inc.
MOVFF
Move f to f
Syntax:
MOVFF fs,fd
Operands:
0
≤ fs ≤ 4095
0
≤ fd ≤ 4095
Operation:
(fs) → fd
Status Affected:
None
Encoding:
1st word (source)
2nd word (destin.)
1100
1111
ffff
ffff
ffff
ffff
fff
fs
fff
fd
Description:
The contents of source register ‘fs’ are
moved to destination register ‘fd’.
Location of source ‘fs’ can be anywhere
in the 4096-byte data space (000h to
FFFh) and location of destination ‘fd’
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF
is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
Words:
2
Cycles:
2 (3)
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
(src)
Process
Data
No
operation
Decode
No
operation
No dummy
read
No
operation
Write
register ‘f’
(dest)
Example:
MOVFF
REG1, REG2
Before Instruction
REG1
=
33h
REG2
=
11h
After Instruction
REG1
=
33h
REG2
=
33h
MOVLB
Move literal to low nibble in BSR
Syntax:
MOVLW k
Operands:
0
≤ k ≤ 255
Operation:
k
→ BSR
Status Affected:
None
Encoding:
0000
0001
kkkk
kkkk
Description:
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘0’,
regardless of the value of k7:k4.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal ‘k’
Process
Data
Write literal
‘k’ to BSR
Example:
MOVLB
5
Before Instruction
BSR Register =
02h
After Instruction
BSR Register =
05h



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