PIC18F4520ESLASHMLQTP datasheet(299/390 Pages) MICROCHIP

299 / 390 page

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 297

PIC18F2420/2520/4420/4520

RCALL

Relative Call

Syntax:

RCALL

Operands:

-1024

≤ n ≤ 1023

Operation:

(PC) + 2

→ TOS,

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1101

1nnn

nnnn

Description:

Subroutine call with a jump up to 1K

from the current location. First, return

address (PC + 2) is pushed onto the

stack. Then, add the 2’s complement

number ‘2n’ to the PC. Since the PC will

have incremented to fetch the next

instruction, the new address will be

PC + 2 + 2n. This instruction is a

two-cycle instruction.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

‘n’

PUSH PC to

stack

Process

Data

Write to PC

operation

Example:

HERE

RCALL Jump

Before Instruction

PC =

Address (HERE)

After Instruction

PC =

Address (Jump)

TOS =

Address (HERE + 2)

RESET

Reset

Syntax:

RESET

Operands:

None

Operation:

Reset all registers and flags that are

affected by a MCLR Reset.

Status Affected:

All

Encoding:

0000

1111

Description:

This instruction provides a way to

execute a MCLR Reset in software.

Words:

Cycles:

Q Cycle Activity:

Decode

Start

Reset

operation

Example:

RESET

After Instruction

Registers =

Reset Value

Flags*

Reset Value

PIC18F4520E/MLQTP Datasheet(PDF) 299 Page - Microchip Technology

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