PIC18F4520ESLASHMLQTP datasheet(347/390 Pages) MICROCHIP

347 / 390 page

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 345

PIC18F2420/2520/4420/4520

FIGURE 26-7:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND

POWER-UP TIMER TIMING

FIGURE 26-8:

BROWN-OUT RESET TIMING

TABLE 26-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER

AND BROWN-OUT RESET REQUIREMENTS

Param.

No.

Symbol

Characteristic

Min

Typ

Max

Units

Conditions

TmcL

MCLR Pulse Width (low)

—

µs

TWDT

Watchdog Timer Time-out Period

(no postscaler)

—4.00

TBD

TOST

Oscillation Start-up Timer Period

1024 TOSC

—

1024 TOSC

—TOSC = OSC1 period

TPWRT

Power-up Timer Period

—

65.5

TBD

TIOZ

I/O High-Impedance from MCLR

Low or Watchdog Timer Reset

—2

—

µs

TBOR

Brown-out Reset Pulse Width

200

—

µsVDD ≤ BVDD (see D005)

TIVRST

Time for Internal Reference

Voltage to become Stable

—20

µs

TLVD

High/Low-Voltage Detect Pulse Width

200

—

µsVDD ≤ VLVD

TCSD

CPU Start-up Time

—

µs

TIOBST

Time for INTOSC to Stabilize

—

Legend: TBD = To Be Determined

VDD

MCLR

Internal

POR

PWRT

Time-out

OSC

Time-out

Internal

Reset

Watchdog

Timer

Reset

I/O pins

Note:

Refer to Figure 26-4 for load conditions.

VDD

BVDD

VBGAP = 1.2V

VIRVST

Enable Internal

Internal Reference

Reference Voltage

Voltage Stable

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